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參數資料
型號: AD8367-EVAL
廠商: Analog Devices, Inc.
英文描述: RECTIFIER STANDARD SINGLE 1A 50V 50 30A-ifsm 5uA-ir 1V-vf DO-41 5K/REEL-13
中文描述: 500兆赫,線性以dB顯卡帶AGC檢測
文件頁數: 12/16頁
文件大?。?/td> 607K
代理商: AD8367-EVAL
REV. 0
AD8367
–12–
VGA Operation
The AD8367 is a general-purpose VGA suitable for use in a
wide variety of applications where voltage-control of gain is
needed. While having a 500 MHz bandwidth, its use is not
limited to high frequency signal processing. Its accurate, tem-
perature- and supply-stable linear-in-dB scaling will be valuable
wherever it is important to have a more dependable response to
the control voltage than is usually offered by VGAs of this sort.
For example, there is no preclusion to its use in speech-band-
width systems.
Figure 7 shows the basic connections. The capacitor C
HP
at Pin
HPFL may be used to alter the high-pass corner frequency of
the signal path, and is associated with the offset control loop that
eliminates the inherent variation in the internal dc balance of the
signal path as the gain is varied (
offset ripple
). This frequency
should be chosen to be about a decade below the lowest frequency
component of the signal. If made much lower than necessary,
the offset loop will not be able to track the variations that occur
when there are rapid changes in V
GAIN
. The control of offset is
important even when the output is ac-coupled because of the poten-
tial reduction of the upper and lower voltage range at this pin.
However, in many applications these components will be unnec-
essary, since an internal network provides a default high-pass
corner of about 500 kHz. For C
HP
1 nF, the modified corner
is at ~10 kHz; it scales downward with increasing capacitance.
TPC 18 shows representative response curves for the indicated
component values.
14
13
12
11
10
9
8
1
2
3
4
5
6
7
ENBL
INPT
MODE
GAIN
DETO
ICOM
ICOM
HPFL
VPSI
VPSO
VOUT
DECL
OCOM
ICOM
AD8367
VOUT
V
IN
V
GAIN
C5
10nF
C4, 0.1 F
C
HP
, 0.1 F
R5
4.7
C3
0.1 F
R6
4.7
C1
1 F
C2
0.1 F
V
P
Figure 7. Basic Connections for Voltage-Controlled
Gain Mode
Modulated Gain Mode
The AD8367 may be used as a means of modulating the signal
level. It should be kept in mind, however, that the gain is a
nonlinear (exponential) function of V
GAIN
; thus it is not suitable
for normal amplitude-modulation functions. The small-signal
bandwidth of the gain interface is ~5 MHz and the slew-rate is
of the order of
±
500 dB/ s. During gain slewing from close to
minimum to maximum gain (or vice versa) the internal interpo-
lation processes in an X-AMP-based VGA rapidly scan the full
range of gain values. The gain and offset ripple associated with
this process may cause transient disturbances in the output.
Therefore, it is inadvisable to use high-amplitude pulse drives
with rise and fall times below 200 ns.
AGC Operation
The AD8367 may be used as an AGC amplifier as shown in
Figure 8. For this application, the accurate internal square-law
detector is employed. The output of this detector is a current
that varies in polarity depending on whether the rms value of the
output is greater or less than its internally-determined
set-point
of 354 mV rms. This is 1 V p-p for sine-wave signals, but the peak
amplitude for other signals, such as Gaussian noise, or those carry-
ing complex modulation, will invariably be somewhat greater.
However, for all waveforms having a crest factor of less than 5,
and when using a supply voltage of 4.5 V to 5.5 V, the rms value
will be correctly measured and delivered at V
OUT
. When using
lower supplies, the rms value of V
OUT
is unaffected (the set-
point is determined by a band-gap reference) but the peak crest
factor capacity is reduced.
The output of the detector is delivered to Pin DETO. The detector
can source up to 60
μ
A and can sink up to 11
μ
A. For a sine-wave
output signal, and under conditions where the AGC loop is settled,
the detector output also takes the form of a sine-wave, but at twice
the frequency and having a mean value of zero. If the input to the
amplifier increases the mean of this current also increases, and
charges the external loop filter capacitor C
AGC
toward more positive
voltages. Conversely, a reduction in V
OUT
below the set-point of
354 mV rms causes this voltage to fall toward ground. The capacitor
voltage is the AGC bias; this may be used as an RSSI (Received
Signal Strength Indicator) output, and is scaled exactly as V
GAIN
,
that is, 20 mV/dB.
14
13
12
11
10
9
8
1
2
3
4
5
6
7
ENBL
INPT
MODE
GAIN
DETO
ICOM
ICOM
HPFL
VPSI
VPSO
VOUT
DECL
OCOM
ICOM
AD8367
VOUT
V
IN
V
AGC
C5
10nF
C4, 0.1 F
C
HP
, 10nF
R5
4.7
C3
0.1 F
R6
4.7
C1
1 F
C2
0.1 F
V
P
C
0.1 F
Figure 8. Basic Connections for AGC Operation
A valuable feature of using a square law detector is that the
RSSI voltage is a true reflection of signal power, and may be
converted to an absolute power measurement for any given
source impedance. The AD8367 may thus be employed as a
true-power meter, or decibel-reading ac voltmeter, as distinct
from its basic amplifier function.
The AGC mode of operation requires that the correct gain direc-
tion is chosen. Specifically, the gain must fall as V
AGC
increases to
restore the needed balance against the set-point. Therefore, the
MODE pin must be pulled low. This accurate leveling function is
shown in Figure 9, where the rms output is held to within 0.1 dB
of the set point for >35 dB range of input levels.
The dynamics of this loop are controlled by C
AGC
acting in
conjunction with an on-chip equivalent resistance R
AGC
of 10 k
which form an effective time-constant T
AGC
loop thus operates as a single-pole system with a loop bandwidth
of 1/(2 T
AGC
). Because the gain control function is linear in
decibels, this bandwidth is independent of absolute signal level.
Figure 10 illustrates the loop dynamics for a 30 dB change in
input signal level with C
AGC
100 pF.
R
AGC
C
AGC
. The
相關PDF資料
PDF描述
AD8367ARU-REEL-7 500 MHz, Linear-in-dB VGA with AGC Detector
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AD8367ARU 500 MHz, Linear-in-dB VGA with AGC Detector
AD8369 45 dB Digitally Controlled VGA LF to 600 MHz
AD8369ARU 45 dB Digitally Controlled VGA LF to 600 MHz
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