
AD8383
Rev. 0 | Page 12 of 16
AD8383
PCB
C
PCB
θ
PCB
T
PCB
θ
JC
θ
JC-BOTTOM
C
JC-BOTTOM
T
J
C
AIR-PCB
θ
AIR-PCB
C
AIR-CASE
θ
AIR-CASE
T
A
T
AMBIENT
C
JC
T
CASE
C
P
θ
,
ψ
θ
θ
JB
,
ψ
JB
0
Figure 14. Thermal Equivalent Circuit
ESTIMATED JUNCTION TEMPERATURE
Assuming no heat flows through the sides of the AD8383 pack-
age, heat flow from the AD8383 is through two paths. While
part of the total heat generated dissipates through the top of the
case, the remainder flows into the PCB to be dissipated.
Assuming there is no other heat-generating component near the
AD8383, the thermal equivalent circuit of a system that consists
of one AD8383 mounted on a PCB is shown in Figure 14.
The thermal resistance of the top of the case, θ
JC
, is constant,
independent of the system variables, and well defined. θ
JC
depends on the thermal resistance of the molding compound.
The thermal resistance of the system, θ
JA
, is system dependent
and therefore cannot be properly estimated. Although it is tra-
ditional to provide the thermal resistance of a JEDEC reference
system in the data sheet, its value may not be appropriate for all
systems and may result in large errors (>>25%).
The thermal resistance of production PCBs, θ
JC
, depends largely
on the particular PCB design, and, to some extent, the environ-
mental conditions specific to the particular system. Although θ
JB
is traditionally not provided on data sheets, a thermal character-
ization parameter, ψ
JB
, of a JEDEC reference system is gaining
increasing acceptance. When the PCB thermal design near the
AD8383 closely approximates the PCB of the JEDEC reference
system, θ
JA
approaches ψ
JB
.
For thermally enhanced packages, the thermal resistance of the
exposed thermal paddle, θ
JC-BOTTOM
, is very low and may
therefore be ignored.
Junction Temperature and Maximum Power Dissipation
In a thermal steady state represented by the simplified schema-
tic shown in Figure 15, heat flow from the die is partly through
the top of the case, causing a temperature drop (
T
J
–
T
CASE
), and
partly through the PCB, causing a temperature drop (
T
J
–
T
PCB
).
The junction temperature is calculated as follows:
CB
P
PCB
J
JC
CASE
J
PCB
CASE
P
θ
T
T
(
θ
T
T
(
P
P
)
)
+
=
+
=
PCB
JC
PCB
JC
CASE
θ
PCB
PCB
JC
J
θ
T
θ
T
+
θ
θ
θ
T
+
+
=
where:
T
J
is the junction temperature
T
CASE
is the temperature of the top of the case (near the output
pins for the AD8383)
T
PCB
is the PCB temperature on the solder side (directly under
the AD8383)
P
is the total power dissipated by the AD8383
θ
JC
is the thermal resistance of the top of the case
θ
PCB
is the thermal resistance of the PCB
At a given maximum allowed junction temperature, the
maximum allowed power dissipation is
(
)
+
θ
=
PCB
PCB
JC
CASE
θ
JMAX
PCB
JC
PCB
JC
θ
MAX
P
θ
T
T
T
θ
θ
For a thermally optimized PCB,
θ
JC
can be replaced with
ψ
PCB
and the equation can be rewritten as
(
)
+
ψ
=
PCB
PCB
JC
CASE
θ
JMAX
PCB
JC
PCB
JC
θ
MAX
P
ψ
T
T
T
ψ
θ