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參數資料
型號: AD8555
廠商: Analog Devices, Inc.
英文描述: Zero-Drift, Digitally Programmable Sensor Signal Amplifier
中文描述: 零漂移,數字可編程傳感器信號放大器
文件頁數: 8/28頁
文件大小: 503K
代理商: AD8555
AD8555
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 8 of 28
VSS
8
VOUT
7
VCLAMP
6
VPOS
5
VDD
1
FILT/DIGOUT
2
DIGIN
3
VNEG
4
AD8555
TOP VIEW
(Not to Scale)
0
Figure 2. 8-Lead SOIC (Not Drawn to Scale)
0
12
11
10
9
NC
VCLAMP
NC
VOUT
1
NC
2
3
5
N
V
N
V
6
7
8
4
DIGIN
NC
FILT/DIGOUT
1
1
1
1
AD8555
TOP VIEW
PIN 1
INDICATOR
A
D
A
D
NC = NO CONNECT
Figure 3. 16-Lead LFCSP (Not Drawn to Scale)
Table 5. Pin Configuration
SOIC
Pin No.
Mnemonic
1
VDD
2
FILT/DIGOUT
LFCSP
Description
Positive Supply Voltage.
Unbuffered Amplifier Output In Series with a Resistor RF. Adding a capacitor
between FILT and VDD or VSS implements a low-pass filtering function. In
read mode, this pin functions as a digital output.
Digital Input.
Negative Amplifier Input (Inverting Input).
Positive Amplifier Input (Noninverting Input).
Set Clamp Voltage at Output.
Buffered Amplifier Output. Buffered version of the signal at the FILT/DIGOUT
pin. In read mode, VOUT is a buffered digital output.
Negative Supply Voltage.
Negative Supply Voltage.
Positive Supply Voltage.
Do Not Connect.
Pin No.
N/A
2
Mnemonic
N/A
FILTDIGOUT
3
4
5
6
7
DIGIN
VNEG
VPOS
VCLAMP
VOUT
4
6
8
10
12
DIGIN
VNEG
VPOS
VCLAMP
VOUT
8
N/A
N/A
N/A
VSS
N/A
N/A
N/A
N/A
13, 14
15, 16
1, 3, 5, 7, 9, 11
N/A
DVSS, AVSS
DVDD, AVDD
NC
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相關代理商/技術參數
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