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參數資料
| 型號： | AD9225-EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete 12-Bit, 25 MSPS Monolithic A/D Converter |
| 中文描述： | 完整的12位，25 MSPS的單片機的A / D轉換器 |
| 文件頁數： | 13/24頁 |
| 文件大小： | 321K |
| 代理商： | AD9225-EB |
AD9225
–13–
REV. A
10
m
F
VINA
VINB
SENSE
AD9225
0.1
m
F
R
S
+V
–V
R
S
VREF
4V
0V
U1
2.0V
Figure 19. Single-Ended AD9225 Op Amp Drive Circuit
Op Amp with DC Level Shifting
Figure 20 shows a dc-coupled level shifting circuit employing an
op amp, A1, to sum the input signal with the desired dc set.
Configuring the op amp in the inverting mode with the given
resistor values results in an ac signal gain of –1. If the signal
inversion is undesirable, interchange the VINA and VINB con-
nections to reestablish the original signal polarity. The dc volt-
age at VREF sets the common-mode voltage of the AD9225.
For example, when VREF = 2.0 V, the input level from the op
amp will also be centered around 2.0 V. The use of ratio matched,
thin-film resistor networks will minimize gain and offset errors.
Also, an optional pull-up resistor, RP, may be used to reduce
the output load on VREF to less than its 1 mA maximum.
0V
DC
+VREF
–VREF
VINA
VINB
AD9225
0.1
m
F
500
V
*
0.1
m
F
500
V
*
7
1
2
3
4
5
A1
6
NC
NC
+V
CC
500
V
*
R
S
VREF
500
V
*
R
S
R
P
**
+V
*OPTIONAL RESISTOR NETWORK-OHMTEK ORNA500D
**OPTIONAL PULL-UP RESISTOR WHEN USING INTERNAL REFERENCE
Figure 20. Single-Ended Input with DC-Coupled Level Shift
AC COUPLING AND INTERFACE ISSUES
For applications where ac coupling is appropriate, the op amp’s
output can be easily level-shifted via a coupling capacitor. This
has the advantage of allowing the op amp’s common-mode level
to be symmetrically biased to its midsupply level (i.e., (V
CC
+
V
EE
)/2). Op amps that operate symmetrically with respect to
their power supplies typically provide the best ac performance as
well as greatest input/output span. Various high speed/perfor-
mance amplifiers which are restricted to +5 V/–5 V operation
and/or specified for +5 V single-supply operation can be easily
configured for the 4 V or 2 V input span of the AD9225. Note
that differential transformer coupling, which is another form of
ac coupling, should be considered for optimum ac performance.
Simple AC Interface
Figure 21 shows a typical example of an ac-coupled, single-
ended configuration. The bias voltage shifts the bipolar, ground-
referenced input signal to approximately AVDD/2. The value
for C1 and C2 will depend on the size of the resistor, R. The
capacitors, C1 and C2, are a 0.1
μ
F ceramic and 10
μ
F tanta-
lum capacitor in parallel to achieve a low cutoff frequency while
maintaining a low impedance over a wide frequency range. The
combination of the capacitor and the resistor form a high-pass
filter with a high-pass –3 dB frequency determined by the equation,
f
–3
dB
= 1/(2
× π
×
R
×
(
C
1 +
C
2))
The low impedance VREF voltage source biases both the VINB
input and provides the bias voltage for the VINA input. Figure
21 shows the VREF configured for 2.0 V thus the input range of
the A/D is 0 V to 4 V. Other input ranges could be selected by
changing VREF.
VINA
VINB
AD9225
+5V
–5V
R
S
0V
–2V
+2V
V
IN
C1
10
m
F
R
S
AD9631
+V
+V
C2
0.1
m
F
10
m
F
0.1
m
F
0.5
2.5
R
R
R
R
Figure 21. AC-Coupled Input
Alternative AC Interface
Figure 22 shows a flexible ac coupled circuit which can be con-
figured for different input spans. Since the common mode volt-
age of VINA and VINB are biased to midsupply independent of
VREF, VREF can be pin strapped or reconfigured to achieve
input spans between 2 V and 4 V p-p. The AD9225’s CMRR
along with the symmetrical coupling R-C networks will reject
both power supply variations and noise. The resistors, R, estab-
lish the common-mode voltage. They may have a high value
(e.g., 5 k
) to minimize power consumption and establish a low
cutoff frequency. The capacitors, C1 and C2, are typically a
0.1
μ
F ceramic and 10
μ
F tantalum capacitor in parallel to
achieve a low cutoff frequency while maintaining a low imped-
ance over a wide frequency range. R
S
isolates the buffer ampli-
fier from the A/D input. The optimum performance is achieved
when VINA and VINB are driven via symmetrical networks.
The f
–3 dB
point can be approximated by the equation,
f
–3
dB
=
1
2
π×
6
K
+
(
C
1
+
C
2)
VINA
VINB
AD9225
1k
V
R
S
V
IN
C2
0.1
m
F
R
S
VCM
1k
V
C2
0.1
m
F
C1
10
m
F
C1
10
m
F
C3
0.1
m
F
Figure 22. AC-Coupled Input-Flexible Input Span,
V
CM
= 2.5 V
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