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參數資料
型號: AD9445-BB-PCB
廠商: Analog Devices, Inc.
英文描述: 14-Bit, 105/125 MSPS, IF Sampling ADC
中文描述: 14位,一百二十五分之一百○五MSPS的,中頻采樣ADC
文件頁數: 3/40頁
文件大小: 965K
代理商: AD9445-BB-PCB
AD9445
SPECIFICATIONS
DC SPECIFICATIONS
AVDD1 = 3.3 V, AVDD2 = 5.0 V, DRVDD = 3.3 V, LVDS mode, specified minimum sampling rate, 2.0 V p-p differential input, internal
trimmed reference (1.0 V mode), AIN = 1.0 dBFS, DCS on, unless otherwise noted. RF ENABLE = AGND.
Table 1.
Parameter
Temp
RESOLUTION
Full
ACCURACY
No Missing Codes
Full
Offset Error
Full
25°C
Gain Error
Full
25°C
Differential Nonlinearity (DNL)
1
Full
Integral Nonlinearity (INL)
1
25°C
Full
VOLTAGE REFERENCE
Output Voltage VREF = 1.0 V
Full
Load Regulation @ 1.0 mA
Full
Reference Input Current (External VREF = 1.6 V)
Full
INPUT REFERRED NOISE
25°C
ANALOG INPUT
Input Span
VREF = 1.6 V
Full
VREF = 1.0 V
Full
Internal Input Common-Mode Voltage
Full
External Input Common-Mode Voltage
Full
Input Resistance
2
Full
Input Capacitance
2
Full
POWER SUPPLIES
Supply Voltage
AVDD1
Full
AVDD2
Full
DRVDD—LVDS Outputs
Full
DRVDD—CMOS Outputs
Full
Supply Current
1
AVDD1
Full
AVDD2
1, 3
Full
I
DRVDD1
—LVDS Outputs
Full
I
DRVDD1
—CMOS Outputs
Full
PSRR
Offset
Full
Gain
Full
POWER CONSUMPTION
LVDS Outputs
Full
CMOS Outputs (DC Input)
Full
1
Measured at the maximum clock rate, f
= 15 MHz, full-scale sine wave, with a 100 Ω differential termination on each pair of output bits for LVDS output mode and
approximately 5 pF loading on each output bit for CMOS output mode.
2
Input capacitance or resistance refers to the effective impedance between one differential input pin and AGND. Refer to Figure 6 for the equivalent analog input structure.
3
For RF ENABLE = AVDD1, I
AVDD2
increases by ~30 mA, which increases power dissipation.
Rev. 0 | Page 3 of 40
AD9445BSVZ-105
Min
Typ
14
Guaranteed
7
±3
3
2
0.6
±0.25
5
±0.65
1.6
0.9
1.0
±2
1.0
3.2
2.0
3.5
3.1
1
6
3.14
3.3
4.75
5.0
3.0
3.0
3.3
335
169
63
14
1
0.2
2.2
2.0
AD9445BSVZ-125
Min
Typ
14
Guaranteed
7
±3
3
2
0.6
±0.25
5
±0.8
2
0.9
1.0
±2
1.0
3.2
2.0
3.5
3.1
1
6
3.14
3.3
4.75
5.0
3.0
3.0
3.3
384
172
63
14
1
0.2
2.3
2.1
Unit
Bits
mV
mV
% FSR
% FSR
LSB
LSB
LSB
V
mV
μA
LSB rms
V p-p
V p-p
V
V
pF
V
V
V
V
mA
mA
mA
mA
mV/V
%/V
W
W
Max
Max
+7
+3
+2
+0.65
+1.6
1.1
3.9
3.46
5.25
3.6
3.6
364
196
78
2.4
+7
+3
+2
+0.65
+2
1.1
3.9
3.46
5.25
3.6
3.6
424
199
78
2.6
相關PDF資料
PDF描述
AD9445-IF-LVDS 14-Bit, 105/125 MSPS, IF Sampling ADC
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