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參數資料
型號: AD9708ARU
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 8-Bit, 100 MSPS TxDAC D/A Converter
中文描述: PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28
封裝: TSSOP-28
文件頁數: 4/16頁
文件大小: 246K
代理商: AD9708ARU
AD9708
–4–
REV. B
ABSOLUTE MAXIMUM RATINGS*
With
Respect to
Parameter
Min
Max
Units
AVDD
DVDD
ACOM
AVDD
CLOCK, SLEEP
Digital Inputs
IOUTA, IOUTB
COMP1, COMP2
REFIO, FSADJ
REFLO
Junction Temperature
Storage Temperature
Lead Temperature
(10 sec)
ACOM
DCOM
DCOM
DVDD
DCOM
DCOM
ACOM
ACOM
ACOM
ACOM
–0.3
–0.3
–0.3
–6.5
–0.3
–0.3
–1.0
–0.3
–0.3
–0.3
+6.5
+6.5
+0.3
+6.5
DVDD + 0.3
DVDD + 0.3
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
+0.3
+150
+150
V
V
V
V
V
V
V
V
V
V
°
C
°
C
–65
+300
°
C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum
ratings for extended periods may effect device reliability.
THERMAL CHARACTERISTICS
Thermal Resistance
28-Lead 300 mil SOIC
θ
JA
= 71.4
°
C/W
θ
JC
= 23
°
C/W
28-Lead TSSOP
θ
JA
= 97.9
°
C/W
θ
JC
= 14.0
°
C/W
PIN CONFIGURATION
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
AD9708
NC = NO CONNECT
(MSB) DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
NC
NC
NC
NC
NC
NC
CLOCK
DVDD
DCOM
NC
AVDD
COMP2
IOUTA
IOUTB
ACOM
COMP1
FS ADJ
REFIO
REFLO
SLEEP
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9708 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN FUNCTION DESCRIPTIONS
Name
Description
Pin No.
1
2–7
8
9–14, 25 NC
15
DB7
DB6–DB1
DB0
Most Significant Data Bit (MSB).
Data Bits 1–6.
Least Significant Data Bit (LSB).
No Internal Connection.
Power-Down Control Input. Active
High. Contains active pull-down circuit,
thus may be left unterminated if not
used.
Reference Ground when Internal 1.2 V
Reference Used. Connect to AVDD to
disable internal reference.
Reference Input/Output. Serves as
reference input when internal reference
disabled (i.e., Tie REFLO to AVDD).
Serves as 1.2 V reference output when
internal reference activated (i.e., Tie
REFLO to ACOM). Requires 0.1
μ
F
capacitor to ACOM when internal
reference activated.
Full-Scale Current Output Adjust.
Bandwidth/Noise Reduction Node.
Add 0.1
μ
F to AVDD for optimum
performance.
Analog Common.
Complementary DAC Current Output.
Full-scale current when all data bits
are 0s.
DAC Current Output. Full-scale
current when all data bits are 1s.
Internal Bias Node for Switch Driver
Circuitry. Decouple to ACOM with
0.1
μ
F capacitor.
Analog Supply Voltage (+2.7 V to
+5.5 V).
Digital Common.
Digital Supply Voltage (+2.7 V to
+5.5 V).
Clock Input. Data latched on positive
edge of clock.
SLEEP
16
REFLO
17
REFIO
18
19
FS ADJ
COMP1
20
21
ACOM
IOUTB
22
IOUTA
23
COMP2
24
AVDD
26
27
DCOM
DVDD
28
CLOCK
ORDERING GUIDE
Temperature
Range
Package
Descriptions
Package
Options*
Model
AD9708AR
AD9708ARU –40
°
C to +85
°
C
AD9708-EB
Evaluation Board
–40
°
C to +85
°
C
28-Lead 300 Mil SOIC R-28
28-Lead TSSOP
RU-28
*R = Small Outline IC; RU = Thin Small Outline IC.
WARNING!
ESD SENSITIVE DEVICE
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相關代理商/技術參數
參數描述
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