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參數(shù)資料
| 型號(hào)： | AD9826 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete 16-Bit Imaging Signal Processor |
| 中文描述： | 完整的16位影像信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 6/20頁(yè) |
| 文件大小： | 159K |
| 代理商： | AD9826 |
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AD9826
–6–
REV. A
DE FINIT IONS OF SPE CIFICAT IONS
INT E GRAL NONLINE ARIT Y (INL)
Integral nonlinearity error refers to the deviation of each individual
code from a line drawn from “zero scale” through “positive full
scale.” T he point used as “zero scale” occurs 1/2 LSB before the
first code transition. “Positive full scale” is defined as a level
1 1/2 LSB beyond the last code transition. T he deviation is
measured from the middle of each particular code to the true
straight line.
DIFFE RE NT IAL NONLINE ARIT Y (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. T hus every
code must have a finite width. No missing codes guaranteed
to 16-bit resolution indicates that all 65536 codes, respec-
tively, must be present over all operating ranges.
OFFSE T E RROR
T he first ADC code transition should occur at a level 1/2 LSB
above the nominal zero scale voltage. T he offset error is the
deviation of the actual first code transition level from the
ideal level.
GAIN E RROR
T he last code transition should occur for an analog value
1 1/2 LSB below the nominal full scale voltage. Gain error is
the deviation of the actual difference between first and last
code transitions and the ideal difference between the first and
last code transitions.
INPUT RE FE RRE D NOISE
T he rms output noise is measured using histogram techniques.
T he ADC output codes’ standard deviation is calculated in
LSB, and can be converted to an equivalent voltage, using the
relationship 1 LSB = 4 V/65536 = 61
μ
V. T he noise may then
be referred to the input of the AD9826 by dividing by the
PGA gain.
CHANNE L-T O-CHANNE L CROSST ALK
In an ideal 3-channel system, the signal in one channel will not
influence the signal level of another channel. T he channel-to-
channel crosstalk specification is a measure of the change that
occurs in one channel as the other two channels are varied. In
the AD9826, one channel is grounded and the other two chan-
nels are exercised with full scale input signals. T he change in the
output codes from the first channel is measured and compared
with the result when all three channels are grounded. T he differ-
ence is the channel-to-channel crosstalk, stated in LSB.
APE RT URE DE LAY
T he aperture delay is the time delay that occurs from when a
sampling edge is applied to the AD9826 until the actual sample
of the input signal is held. Both CDSCLK 1 and CDSCLK 2
sample the input signal during the transition from high to low,
so the aperture delay is measured from each clock’s falling edge
to the instant the actual internal sample is taken.
POWE R SUPPLY RE JE CT ION
Power supply rejection specifies the maximum full-scale change
that occurs from the initial value when the supplies are varied
over the specified limits.
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| AD9830 | CMOS Complete DDS |
| AD9830AST | CMOS Complete DDS |
| AD9831 | CMOS Complete DDS |
| AD9831AST | CMOS Complete DDS |
| AD9832 | CMOS Complete DDS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9826_12 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 16-Bit Imaging Signal Processor |
| AD9826-EB | 制造商:Analog Devices 功能描述:- Bulk |
| AD9826KRS | 制造商:Analog Devices 功能描述:AFE Video 1ADC 16-Bit 5V 28-Pin SSOP Tube 制造商:Analog Devices 功能描述:IC 16-BIT SIGNAL PROCESSOR |
| AD9826KRSRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 16-Bit 5V 28-Pin SSOP T/R |
| AD9826KRSZ | 功能描述:IC IMAGE SGNL PROC 16BIT 28-SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 |
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