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參數資料
| 型號： | AD9873 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Analog Front End Converter for Set-Top Box, Cable Modem |
| 中文描述： | 模擬前端轉換器，用于機頂盒，電纜調制解調器 |
| 文件頁數： | 3/39頁 |
| 文件大小： | 935K |
| 代理商： | AD9873 |
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REV. 0
–3–
AD9873
(V
AS
= 3.3 V 5%, V
DS
= 3.3 V 10%, f
OSCIN
= 27 MHz, f
SYSCLK
= 216 MHz, f
MCLK
= 54 MHz
(M = 8, N = 4), ADC Sample Rate derived from PLL f
MCLK
, R
SET
= 10 k , 75
DAC Load)
Test
Level
Parameter
Temp
Min
Typ
Max
Unit
SYSTEM CLOCK, DAC SAMPLING f
SYSCLK
Frequency Range
Full
III
232
MHz
OSC IN and XTAL CHARACTERISTICS
Frequency Range
Duty Cycle
Input Capacitance
Input Resistance
Full
25 C
25 C
25 C
III
III
IV
IV
3
35
33
65
MHz
%
pF
M
50
3
100
MCLK OUT JITTER (f
MCLK
Derived from PLL)
TxDAC CHARACTERISTICS
1
Resolution
Full-Scale Output Current
Gain Error (Using Internal Reference)
Output Offset
Reference Voltage (REFIO Level)
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Output Capacitance
Phase Noise @ 1 kHz Offset, 42 MHz
Output Voltage Compliance Range
Wideband SFDR
5 MHz Analog Out, I
OUT
= 4 mA
65 MHz Analog Out, I
OUT
= 4 mA
Narrowband SFDR ( 100 kHz Window)
65 MHz Analog Out, I
OUT
= 4 mA
Tx MODULATOR CHARACTERISTICS
I/Q Offset
Pass Band Amplitude Ripple (f < f
IQCLK
/8)
Pass Band Amplitude Ripple (f < f
IQCLK
/4)
Stop Band Response (f > f
IQCLK
×
3/4)
8-BIT ADC CHARACTERISTICS
Resolution
Conversion Rate
Pipeline Delay
DC Accuracy
Differential Nonlinearity
Integral Nonlinearity
Offset Error for Each 8-Bit ADC
Gain Error for Each 8-Bit ADC
Offset Matching Between 8-Bit ADCs
Gain Matching Between 8-Bit ADCs
Analog Input
Input Voltage Range
Input Capacitance
Differential Input Resistance
Aperture Delay
Aperture Uncertainty (Jitter)
Input Bandwidth (–3 dB)
Input Referred Noise
Reference Voltage Error
REFT8–REFB8 (0.5 V)
Dynamic Performance (A
IN
= –0.5 dB FS, f = 5 MHz)
Signal-to-Noise and Distortion Ratio (SINAD)
25 C
IV
6
ps rms
N/A
Full
25 C
25 C
25
°
C
25 C
25 C
25 C
25 C
Full
N/A
III
I
I
I
IV
IV
IV
IV
III
12
4
0.14
Bits
mA
% FS
% FS
V
LSB
LSB
pF
dBc/Hz
V
2
–3
–1
1.18
20
+3
+1
1.28
1.23
±
2.5
±
8
5
–113
–0.5
+1.5
25 C
25 C
IV
IV
59
54
dBc
dBc
25 C
IV
79
dBc
Full
Full
Full
Full
III
III
III
III
50
55
dB
dB
dB
dB
0.1
0.5
–63
N/A
Full
N/A
N/A
III
N/A
8
Bits
MHz
ADC Cycles
16.5
3.5
25 C
25 C
25 C
25 C
Full
Full
IV
IV
IV
IV
IV
IV
0.5
0.5
0.75
4
3
4.5
LSB
LSB
% FSR
% FSR
LSB
LSB
Full
25 C
25 C
25 C
25 C
25 C
25 C
IV
IV
IV
IV
IV
IV
IV
1
1.4
4
2.0
1.2
90
600
V p-p
pF
k
ns
ps rms
MHz
μ
V
25 C
I
±
4
±
92
mV
Full
II
43.5
48
dB
SPECIFICATIONS
相關PDF資料 |
PDF描述 |
|---|---|
| AD9873-EB | Analog Front End Converter for Set-Top Box, Cable Modem |
| AD9873JS | Analog Front End Converter for Set-Top Box, Cable Modem |
| AD9874 | IF Digitizing Subsystem |
| AD9874BST | IF Digitizing Subsystem |
| AD9874EB | IF Digitizing Subsystem |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9873-EB | 制造商:Analog Devices 功能描述: |
| AD9873JS | 制造商:Analog Devices 功能描述: |
| AD9874 | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Digitizing Subsystem |
| AD9874ABST | 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
| AD9874ABST | 制造商:Analog Devices 功能描述:IF DIGITIZING SYBSYSTEM ((NW)) 制造商:Analog Devices 功能描述:IC, IF DIGITIZING SUBSYSTEM, LQFP-48 |
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