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參數資料
| 型號： | AD9949KCPZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | 12-Bit CCD Signal Processor with Precision Timing Core |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, QCC40 |
| 封裝： | 6 X 6 MM, LEAD FREE, MO-220-VJJD-2, LFCSP-40 |
| 文件頁數： | 5/36頁 |
| 文件大小： | 707K |
| 代理商： | AD9949KCPZRL |
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AD9949
TIMING SPECIFICATIONS
C
L
= 20 pF, f
CLI
= 36 MHz, unless otherwise noted.
Table 4.
Parameter
MASTER CLOCK (CLI) (See Figure 16)
CLI Clock Period
CLI High/Low Pulse Width
Delay from CLI to Internal Pixel Period Position
CLPOB PULSE WIDTH (PROGRAMMABLE)
1
SAMPLE CLOCKS (See Figure 18)
SHP Rising Edge to SHD Rising Edge
DATA OUTPUTS (See Figure 19 and Figure 20)
Output Delay From Programmed Edge
Pipeline Delay
SERIAL INTERFACE (SERIAL TIMING SHOWN IN Figure 14 and Figure 15)
Maximum SCK Frequency
SL to SCK Setup Time
SCK to SL Hold Time
SDATA Valid to SCK Rising Edge Setup
SCK Falling Edge to SDATA Valid Hold
SCK Falling Edge to SDATA Valid Read
Rev. B | Page 5 of 36
Symbol
t
CLI
t
ADC
t
CLIDLY
t
COB
t
S1
t
OD
f
SCLK
t
LS
t
LH
t
DS
t
DH
t
DV
Min
27.8
11.2
2
12.5
10
10
10
10
10
10
Typ
13.9
6
20
13.9
6
11
Max
16.6
Unit
ns
ns
ns
Pixels
ns
ns
Cycles
MHz
ns
ns
ns
ns
ns
1
Minimum CLPOB pulse width is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp reference.
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| AD9949AKCPZ | Circular Connector; No. of Contacts:61; Series:MS27474; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:24; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:24-61 RoHS Compliant: No |
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