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參數資料
| 型號： | AD9953 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| 中文描述： | 400 MSPS的14位，1.8V CMOS的直接數字頻率合成器 |
| 文件頁數： | 24/42頁 |
| 文件大?。?/td> | 473K |
| 代理商： | AD9953 |
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PRELIMINARY TECHNICAL DATA
Similarly, when the RAM output drives the phase offset adder the Frequency Tuning Word (FTW,
hex address 04h) drives the phase accumulator. When CFR1<31> is logic zero, the RAM is
inactive unless being written to via the serial port. The power up state of the AD9953 is single
tone mode, in which the RAM Enable bit is inactive. The RAM is segmented into four unique
slices controlled by the Profile<1:0> input pins.
All RAM writes/reads, unless otherwise specified, are controlled by the Profile<1:0> input pins
and the respective RAM Segment Control Word. The RAM can be written to during normal
operation BUT any IO operation that commands the RAM to be written immediately suspends read
operation from the RAM, causing the current mode of operation to be non-functional. This
excludes single tone mode, as the RAM is not read in this mode
.
AD9953
Modes of Operation
Single Tone Mode
In single tone mode, the DDS core uses a single tuning word. Whatever value is stored in FTW0 is
supplied to the phase accumulator. This value can only be changed statically, which is done by
writing a new value to FTW0 and issuing an I/O UPDATE. Phase adjustment is possible through
the phase offset register.
RAM Controlled Modes of Operation
Direct Switch Mode
Direct Switch Mode enables FSK or PSK modulation. The AD9953 is programmed for Direct
Switch Mode by writing the RAM Enable bit true and programming the RAM Segment Mode
Control bits of each desired profile to logic 000(b). This mode simply reads the RAM contents at
the RAM Segment Beginning Address for the current profile. No address ramping is enabled in
Direct Switch mode.
To perform 4-tone FSK, the user programs each RAM Segment Control Word for Direct Switch
Mode and a unique beginning address value. In addition, the RAM Enable bit is written true which
enables the RAM and the RAM destination bit is written false, setting the RAM output to be the
frequency tuning word. The Profile<1:0> inputs are the 4-tone FSK data inputs. When the profile
is changed, the frequency tuning word stored in the new profile is loaded into the phase
accumulator and used to increment the currently stored value in a phase continuous fashion. The
Phase Offset Word drives the phase-offset adder. 2-tone FSK is accomplished by using only one
Profile pin for data.
Programming the AD9953 for PSK modulation is similar to FSK except the RAM destination bit is
set to a logic 1, enabling the RAM output to drive the phase offset adder. The FTW drives the
input to the phase accumulator. Toggling the profile pins changes (modulates) the current phase
REV. PrB 1/30/03
Page 24
Analog Devices, Inc.
相關PDF資料 |
PDF描述 |
|---|---|
| AD9953ASV | 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9953PCB | 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9954 | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9954YSV | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9954YSV-REEL7 | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9953/PCB | 制造商:Analog Devices 功能描述:400 MSPS, 14BIT DGTL SYNTHESIZER - Bulk |
| AD9953ASV | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9953PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9953YSV | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP 制造商:Rochester Electronics LLC 功能描述:AD9953 400 MSPS DDS W/ 14 BIT DAC - Bulk 制造商:Analog Devices 功能描述:IC DDS 400MSPS SMD 9953 TQFP48 |
| AD9953YSV-REEL7 | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP T/R |
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