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參數(shù)資料
| 型號(hào)： | AD9953ASV |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號(hào)處理外設(shè) |
| 英文描述： | 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| 中文描述： | DSP-NUM CONTROLLED OSCILLATOR, PQFP48 |
| 封裝： | TQFP-48 |
| 文件頁(yè)數(shù)： | 34/42頁(yè) |
| 文件大小： | 473K |
| 代理商： | AD9953ASV |
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PRELIMINARY TECHNICAL DATA
AD9953
Synchronization; Register Updates (I/O UPDATE)
Functionality of the SyncClk and I/O UPDATE
Data into the AD9953 is synchronous to the sync_clk signal (supplied externally to the user
on the SYNC_CLK pin). The I/O_UPDATE pin is sampled on the rising edge of the sync_clk.
Internally, sysclk is fed to a divide-by-4 frequency divider to produce the sync_clk signal.
The sync_clk signal is provided to the user on the SYNC_CLK pin. This enables synchronization
of external hardware with the device’s internal clocks. This is accomplished by forcing any
external hardware to obtain its timing from sync_clk. The I/O UPDATE signal coupled with
sync_clk is used to transfer internal buffer contents into the Control Registers of the device. The
combination of the sync_clk and I/O UPDATE pins provides the user with constant latency relative
to sysclk and also ensures phase continuity of the analog output signal when a new tuning word or
phase offset value is asserted. Figure E demonstrates an I/O Update timing cycle and
synchronization.
Notes to synchronization logic:
1) The I/O UPDATE signal is edge detected to generate a single rising edge clock signal
that drives the register bank flops. The I/O UPDATE signal has no constraints on duty
cycle. The minimum low time on I/O UPDATE is one sync_clk clock cycle.
2) The I/O UPDATE pin is setup and held around the rising edge of sync_clk and has zero
hold time and 10ns setup time.
REV. PrB 1/30/03
Page 34
Analog Devices, Inc.
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| AD9954YSV | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9954YSV-REEL7 | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9953PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9953YSV | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP 制造商:Rochester Electronics LLC 功能描述:AD9953 400 MSPS DDS W/ 14 BIT DAC - Bulk 制造商:Analog Devices 功能描述:IC DDS 400MSPS SMD 9953 TQFP48 |
| AD9953YSV-REEL7 | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP T/R |
| AD9953YSVZ | 功能描述:IC DDS DAC 14BIT 400MSPS 48-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9953YSVZ-REEL7 | 功能描述:IC DDS DAC 14BIT 1.8V 48TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
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