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參數(shù)資料
| 型號(hào)： | AD9953PCB |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| 中文描述： | 400 MSPS的14位，1.8V CMOS的直接數(shù)字頻率合成器 |
| 文件頁數(shù)： | 21/42頁 |
| 文件大?。?/td> | 473K |
| 代理商： | AD9953PCB |
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PRELIMINARY TECHNICAL DATA
CFR1<1>:
SyncClk Disable bit.
When CFR1<1> = 0
(default)
, the SyncClk pin is active.
When CFR1<1> = 1, the SyncClk pin assumes a static logic 0 state (disabled). In
this state the pin drive logic is shut down to keep noise generated by the digital
circuitry at a minimum. However, the synchronization circuitry remains active
(internally) to maintain normal device timing.
AD9953
CFR1<0>:
Not used. Leave at 0.
NOTE: Assertion of this bit may cause the SyncClk pin to momentarily stop generating a Sync Clock signal. The device will not be operational during the
re-synchronization period.
Control Function Register #2 (CFR2)
The CFR2 is comprised of three bytes located in parallel addresses 06h-04h. The CFR2 is used to
control the various functions, features, and modes of the AD9953, primarily related to the analog
sections of the chip. All bits of the CFR2 will be routed directly to the Analog section of the
AD9953 as a single 24-bit bus labeled CFR2<23:0>.
CFR2<11>:
High Speed Sync Enable bit.
When CFR2<11> = 0
(default)
the High Speed Sync enhancement is off.
When CFR2<11> = 1, the High Speed Sync enhancement is on. See the
Synchronizing Multiple AD9953s
section of this document for details.
CFR2<10>:
Hardware Manual Sync Enable bit.
When CFR2<10> = 0
(default)
the Hardware Manual Sync function is off.
When CFR2<11> = 1, the Hardware Manual Sync function is enabled. While this bit
is set, a rising edge on the SYNC_IN pin will cause the device to advance the
SYNC_CLK rising edge by one REFCLK cycle. Unlike the software manual sync
bit, this bit does not self-clear. Once the hardware manual sync mode is enabled, it
will stay enabled until this bit is cleared. See the
Synchronizing Multiple AD9953s
section of this document for details.
REV. PrB 1/30/03
Page 21
Analog Devices, Inc.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9954 | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9954YSV | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9954YSV-REEL7 | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9956 | 2.7 GHz DDS-Based AgileRF |
| AD9956YCPZ-REEL1 | 2.7 GHz DDS-Based AgileRF |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9953YSV | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP 制造商:Rochester Electronics LLC 功能描述:AD9953 400 MSPS DDS W/ 14 BIT DAC - Bulk 制造商:Analog Devices 功能描述:IC DDS 400MSPS SMD 9953 TQFP48 |
| AD9953YSV-REEL7 | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP T/R |
| AD9953YSVZ | 功能描述:IC DDS DAC 14BIT 400MSPS 48-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9953YSVZ-REEL7 | 功能描述:IC DDS DAC 14BIT 1.8V 48TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9954 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
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