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參數資料
| 型號： | ADE7754ARRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | ADE7754 |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | MS-013AD, SOIC-24 |
| 文件頁數： | 32/44頁 |
| 文件大小： | 630K |
| 代理商： | ADE7754ARRL |
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REV. PrG 01/03
PRELIMINARY TECHNICAL DATA
ADE7754
–
32
–
CS
SCLK
DIN
A4 A3 A2
A1 A0
DB7
Most Significant Byte
t
1
t
2
t
3
t
4
t
5
t
8
1
DB0
DB7
DB0
t
6
Least Significant Byte
t
7
t
7
0
Command Byte
A5
Figure 42
–
Serial Interface Write Timing Diagram
SCLK
X
X
X
X
DB11 DB10
DB9
DB8
DIN
Most Significant Byte
DB3
DB2
DB1
DB0
DB7
DB6
DB5
DB4
Least Significant Byte
Figure 43
—
12 bit Serial Write Operation
ADE7754 Serial Read Operation
During a data read operation from the ADE7754 data is
shifted out at the DOUT logic output on the rising edge of
SCLK. As was the case with the data write operation, a data
read must be preceded with a write to the Communications
register.
With the ADE7754 in communications mode and
CS
logic
low an eight bit write to the Communications register first
takes place. The MSB of this byte transfer must be a 0,
indicating that the next data transfer operation is a read. The
six LSBs of this byte contain the address of the register which
is to be read. The ADE7754 starts shifting out of the register
data on the next rising edge of SCLK
–
see Figure 44. At this
point the DOUT logic output switches from high impedance
state and starts driving the data bus. All remaining bits of
register data are shifted out on subsequent SCLK rising
edges. The serial interface enters communications mode
again as soon as the read has been completed. The DOUT
logic output enters a high impedance state on the falling edge
of the last SCLK pulse. The read operation may be aborted
by bringing the
CS
logic input high before the data transfer
is completed. The DOUT output enters a high impedance
state on the rising edge of
CS
.
When an ADE7754 register is addressed for a read operation,
the entire contents of that register are transferred to the Serial
port. This allows the ADE7754 to modify its on-chip
registers without the risk of corrupting data during a multi
byte transfer.
Note: when a read operation follows a write operation, the
read command (i.e., write to communications register)
should not happen for at least TBD after the end of the write
operation. If the read command is sent within TBD of the
write operation, the last byte of the write operation may be
lost. The is given as timing specification t
15
.
CS
SCLK
DIN
A4
A3 A2
A1 A0
t
1
t
11
t
12
t
9
DB7
DOUT
t
13
DB0
DB0
DB7
t
10
t
14
Most Significant
Byte
Least Significant
Byte
0
0
Command
Byte
A5
Figure 44
–
Serial Interface Read Timing Diagram
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| ADE7756EB | Evaluation Board Documentation AD7756 Energy metering IC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADE7754ARZ | 功能描述:IC ENERGY METERING 3PHASE 24SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測量 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:* |
| ADE7754ARZRL | 功能描述:IC ENERGY METERING 3PHASE 24SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測量 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:* |
| ADE7755 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Energy Metering IC with Pulse Output |
| ADE7755AARSRL | 制造商:Analog Devices 功能描述:ENERGY METERING IC WITH P - Tape and Reel |
| ADE7755AN | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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