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參數資料
型號: ADE7754ARRL
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調理
英文描述: ADE7754
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO24
封裝: MS-013AD, SOIC-24
文件頁數: 37/44頁
文件大小: 630K
代理商: ADE7754ARRL
REV. PrG 01/03
PRELIMINARY TECHNICAL DATA
ADE7754
37
Address
[A5:A0]
Default
Value
Name
R/W*
Length
Description
2Ch
2Dh
2Eh
2Fh
30h
31h
32h
33h
34h
35h
AVRMS
BVRMS
CVRMS
AIRMSOS
BIRMSOS
CIRMSOS
AVRMSOS
BVRMSOS
CVRMSOS
AAPGAIN
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
24
24
24
12
12
12
12
12
12
12
0
0
0
0
0
0
0
0
0
0
Phase A Voltage channel RMS register.
Phase B Voltage channel RMS register.
Phase C Voltage channel RMS register.
Phase A Current RMS offset correction register.
Phase B Current RMS offset correction register.
Phase C Current RMS offset correction register.
Phase A Voltage RMS offset correction register.
Phase B Voltage RMS offset correction register.
Phase C Voltage RMS offset correction register.
Phase A Active Power Gain Adjust. The Active Power accu-
mulation of the phase A can be calibrated by writing to this
register. The calibration range is ±50% of the nominal full
scale of the Active Power. The resolution of the gain is
0.0244% / LSB - see
Current channel Gain Adjust
Phase B Active Power Gain Adjust
Phase C Active Power Gain Adjust
Phase A voltage RMS gain. The Apparent Power accumula-
tion of the phase A can be calibrated by writing to this
register. The calibration range is ±50% of the nominal full
scale of the Apparent Power. The resolution of the gain is
0.0244% / LSB - see
Voltage RMS Gain Adjust
Phase B voltage RMS gain
Phase C voltage RMS gain
36h
37h
38h
BAPGAIN
CAPGAIN
AVGAIN
R/W
R/W
R/W
12
12
12
0
0
0
39h
3Ah
BVGAIN
CVGAIN
R/W
R/W
12
12
0
0
3Bh
3Dh
3Eh
Reserved
CHKSUM
R
8
Check sum register. The content of this register represents
the sum of all ones of the latest register read from the SPI
port.
Version of the Die
3Fh
VERSION
R
8
1
*R/W: Read/Write capability of the register.
R: Read only register.
R/W: Register that can be both read and written.
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