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參數資料
| 型號： | ADF4360-4BCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | Integrated Synthesizer and VCO |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, QCC24 |
| 封裝： | 4 X 4 MM, MO-220-VGGD-2, LFCSP-24 |
| 文件頁數： | 13/20頁 |
| 文件大小： | 336K |
| 代理商： | ADF4360-4BCP |
PRELIMINARY TECHNICAL DATA
ADF4360-2
REV. PrA 07/03
–13–
TABLE V: N COUNTER LATCH
DB20 DB19
DB18 DB17 DB16
DB15
DB14 DB13 DB12
DB11 DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
C2 (1) C1 (0)
A1
A2
A3
A4
A5
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
RSV
Control
Bits
5-Bit A Counter
13-Bit B Counter
DB21
Reserved
DB22
DB23
C
CPG
These bits are not
used by the device
and are Don't Care
Bits.
F4 (Function Latch)
Fastlock Enable
0
CP Gain
Operation
0
Charge Pump Current Setting
1 is permanently used
Charge Pump Current Setting
2 is permanently used
0
1
B13
0
0
0
0
.
.
.
1
B12
0
0
0
0
.
.
.
1
B11
0
0
0
0
.
.
.
1
B3
0
0
0
1
.
.
.
1
B2
0
0
1
1
.
.
.
0
B1
0
1
0
1
.
.
.
0
B Counter Divide Ratio
Not Allowed
Not Allowed
Not Allowed
3
.
.
.
8188
..........
..........
..........
..........
..........
..........
..........
..........
1
1
1
..........
1
0
1
8189
1
1
1
..........
1
1
0
8190
1
1
1
..........
1
1
1
8191
A5
A4
..........
A2
A1
A Counter
Divide Ratio
0
1
2
3
.
.
.
28
0
0
0
0
.
.
.
1
0
0
0
0
.
.
.
1
..........
..........
..........
..........
..........
..........
..........
..........
0
0
1
1
.
.
.
0
0
1
0
1
.
.
.
0
1
1
..........
0
1
29
1
1
..........
1
0
30
1
1
..........
1
1
31
N = BP + A, P is Prescaler value set in the Control Latch.
B must be greater than or equal to A. For continuously
adjacent values of (N x F
REF
), at the output, N
MIN
is (P
2
- P)
X
X
X = Don’t Care
These bits are not
used by the device
and are Don't Care
Bits.
R
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相關代理商/技術參數 |
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| ADF4360-4BCPRL | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP T/R |
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