
ADM1021
–3–
REV. 0
ABSOLUTE MAXIMUM RATINGS*
Positive Supply Voltage (V
DD
) to GND . . . . . . .–0.3 V to +6 V
D+, ADD0, ADD1 . . . . . . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
D– to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.6 V
SCLK, SDATA,
ALERT
,
STBY
. . . . . . . . . . . .–0.3 V to +6 V
Input Current, SDATA . . . . . . . . . . . . . . . . –1 mA to +50 mA
Input Current, D– . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
1 mA
ESD Rating, all pins (Human Body Model) . . . . . . . . 2000 V
Continuous Power Dissipation
Up to +70
°
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW
Derating above +70
°
C . . . . . . . . . . . . . . . . . . . . 6.7 mW/
°
C
Operating Temperature Range . . . . . . . . . . –55
°
C to +125
°
C
Maximum Junction Temperature (T
J
max) . . . . . . . . . +150
°
C
Storage Temperature Range . . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperature, Soldering
Vapor Phase 60 sec . . . . . . . . . . . . . . . . . . . . . . . . . +215
°
C
Infrared 15 sec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +200
°
C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
THERMAL CHARACTERISTICS
16-Lead QSOP Package:
θ
JA
= 150
°
C/Watt.
ORDERING GUIDE
Temperature
Range
0
°
C to +85
°
C
Package
Description
Package
Option
Model
ADM1021ARQ
16-Lead QSOP RQ-16
PIN FUNCTION DESCRIPTIONS
Mnemonic
Description
Pin No.
1, 16
TEST
Test pin for factory use only. See
note.
Positive supply, +3 V to +5.5 V.
Positive connection to remote tem-
perature sensor.
Negative connection to remote tem-
perature sensor.
No Connect.
Three-state logic input, higher bit of
device address.
Supply 0 V connection.
Three-state logic input, lower bit of
device address.
Open-drain logic output used as
interrupt or SMBus alert.
Logic input/output, SMBus serial
data. Open-drain output.
Logic input, SMBus serial clock.
Logic input selecting normal opera-
tion (high) or standby mode (low).
2
3
V
DD
D+
4
D–
5, 9, 13
6
NC
ADD1
7, 8
10
GND
ADD0
11
ALERT
12
SDATA
14
15
SCLK
STBY
NOTE
Pins 1 and 16 are reserved for test purposes. Ideally these pins should be left
unconnected. If routing through these pins is required, then both should be at
the same potential (i.e., connected together).
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
NC = NO CONNECT
TEST
V
DD
D+
D–
NC
ADD1
GND
GND
TEST
STBY
SCLK
NC
SDATA
ALERT
ADD0
NC
ADM1021
PROTOCOL
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
SCL
SDA
PROTOCOL
SCL
SDA
t
LOW
t
HIGH
1/f
SCL
t
R
t
F
BIT 0
LSB
(R/
W
)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
Figure 1. Diagram for Serial Bus Timing