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參數資料
型號: ADM1026JSTZ-REEL
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: Complete Thermal and System Management Controller
中文描述: 4-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, LEAD FREE, PLASTIC, MS-026BBC, LQFP-48
文件頁數: 45/56頁
文件大小: 634K
代理商: ADM1026JSTZ-REEL
ADM1026
Rev. A | Page 45 of 56
Table 46. Register 21h, Status Register 2 (Power-On Default 00h)
Bit Name
R/W
Description
1, if A
IN0
to A
IN7
value is above the high limit or below the low limit on the previous conversion
cycle;0 otherwise.
1, if A
IN0
to A
IN7
value is above the high limit or below the low limit on the previous conversion
cycle;0 otherwise.
1, if A
IN0
to A
IN7
value is above the high limit or below the low limit on the previous conversion
cycle;0 otherwise.
1, if A
IN0
to A
IN7
value is above the high limit or below the low limit on the previous conversion
cycle;0 otherwise.
1, if A
IN0
to A
IN7
value is above the high limit or below the low limit on the previous conversion
cycle;0 otherwise.
1, if A
IN0
to A
IN7
value is above the high limit or below the low limit on the previous conversion
cycle;0 otherwise.
1, if A
IN0
to A
IN7
value is above the high limit or below the low limit on the previous conversion
cycle;0 otherwise.
1, if A
IN0
to A
IN7
value is above the high limit or below the low limit on the previous conversion
cycle;0 otherwise.
0
A
IN0
Status = 0
R
1
A
IN1
Status = 0
R
2
A
IN2
Status = 0
R
3
A
IN3
Status = 0
R
4
A
IN4
Status = 0
R
5
A
IN5
Status = 0
R
6
A
IN6
Status = 0
R
7
A
IN7
Status = 0
R
Table 47. Register 22h, Status Register 3 (Power-On Default 00h)
Bit
Name
R/W
0
FAN0 Status 1 = 0
R
1
FAN1 Status 1 = 0
R
2
FAN2 Status 1 = 0
R
3
FAN3 Status 1 = 0
R
4
FAN4 Status 1 = 0
R
5
FAN5 Status 1 = 0
R
6
FAN6 Status 1 = 0
R
7
FAN7 Status 1 = 0
R
Description
1, if FAN0 to FAN7 value is above the high limit on the previous conversion cycle; 0 otherwise.
1, if FAN0 to FAN7 value is above the high limit on the previous conversion cycle; 0 otherwise.
1, if FAN0 to FAN7 value is above the high limit on the previous conversion cycle; 0 otherwise.
1, if FAN0 to FAN7 value is above the high limit on the previous conversion cycle; 0 otherwise.
1, if FAN0 to FAN7 value is above the high limit on the previous conversion cycle; 0 otherwise.
1, if FAN0 to FAN7 value is above the high limit on the previous conversion cycle; 0 otherwise.
1, if FAN0 to FAN7 value is above the high limit on the previous conversion cycle; 0 otherwise.
1, if FAN0 to FAN7 value is above the high limit on the previous conversion cycle; 0 otherwise.
Table 48. Register 23h, Status Register 4 (Power-On Default 00h)
Bit Name
R/W
0
Int Temp Status = 0
R
Description
1, if Int value is above the high limit or below the low limit on the previous conversion cycle, 0
otherwise. This bit is set (once only) if a THERM mode is engaged as a result of int temperature
readings exceeding the Int THERM limit. This bit is also set (once only) if THERM mode is disengaged
as a result of internal temperature readings going 5°C below Int THERM limit.
1, if V
BAT
value is above the high limit or below the low limit on the previous conversion cycle,
0 otherwise.
1, if A
IN8
value is above the high limit or below the low limit on the previous conversion cycle,
0 otherwise.
This bit is set (once only) if a THERM mode is engaged as a result of temperature readings
exceeding the THERM limits on any channel. This bit is also set (once only) if THERM mode is
disengaged as a result of temperature readings going 5°C below THERM limits on any channel.
This bit is set (once only) if the fan turns on when in automatic fan speed control (AFC) mode as a
result of a temperature reading exceeding T
MIN
on any channel. This bit is also set (once only) if the
fan turns off when in automatic fan speed control mode.
Unused. Reads back 0.
This bit latches a chassis intrusion event.
When GPIO16 is configured as an input, this bit is set when GPIO16 is asserted. (Asserted may be
active high or active low depending on the setting in GPIO configuration register.)
When GPIO16 is configured as an output, setting this bit asserts GPIO16. (Asserted may be active
high or active low depending on setting in GPIO configuration register.)
1
V
BAT
Status = 0
R
2
A
IN8
Status = 0
R
3
THERM Status = 0
R
4
AFC Status = 0
R
5
6
7
Unused
CI Status = 0
GPIO16 Status = 0
R
R
R
R/W
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