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| 型號(hào)： | ADM1041AARQZ-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類(lèi)： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Secondary-Side Controller with Current Share and Housekeeping |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO24 |
| 封裝： | LEAD FREE, MO-137AE, QSOP-24 |
| 文件頁(yè)數(shù)： | 9/56頁(yè) |
| 文件大小： | 991K |
| 代理商： | ADM1041AARQZ-REEL7 |
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ADM1041A
Parameter
CURRENT LIMIT ERROR AMPLIFIER
Current Limit Trim Range
2
Current Limit Trim Step
Current Limit Trim Step
Rev. 0 | Page 9 of 56
Min
105
Typ
1.1
26.5
Max
130
Unit
%
%
mV
Test Conditions/Comments
See Figure 13
After I
SHARE
calibration
2.0 ≤ V
SHARE
≤ 2.8 V typ, 5 bits, 31 steps.
Reg 04h[7:3]. See Table 13.
I
CCMP
= ±20 μA. See Figure 12.
V
CCMP
= >1 V
V
CCMP
= <V
DD
– 1 V
See Figure 15
R
L
= 1 kΩ, V
SHRS
≤ V
DD
– 2 V
Current at which V
OUT
does not drop
by more than 5%
V
SHARE
= 2.0 V
See Figure 15
Transconductance
Output Source Current
Output Sink Current
CURRENT SHARE DRIVER
Output Voltage
6
Short Circuit Source Current
Source Current
100
(V
DD
– 0.4)
200
40
40
300
55
15
μA/V
μA
μA
V
mA
mA
Sink Current
CURRENT SHARE DIFFERENTIAL SENSE
AMPLIFIER
V
S
– Input Voltage
V
SHRS
Input Voltage
Input Impedance
2
Gain
CURRENT SHARE ERROR AMPLIFIER
Transconductance, SHRS to SCMP
Output Source Current
Output Sink Current
Input Offset Voltage
Share OK Window Comparator Threshold
(Share Drive Error)
CURRENT LIMIT
Current Limit Control Lower Threshold
Current Limit Control Upper Threshold
CURRENT SHARE CAPTURE
Current Share Capture Range
Capture Threshold
FET OR GATE DRIVE
Output Low Level (On)
Output Leakage Current
REVERSE VOLTAGE COMPARATOR, FS, FD
Common-Mode Range
60
100
μA
65
100
40
1.3
0.7
1.4
2.1
2.8
0.6
5
0.25
100
1.0
200
40
40
50
±100
±200
±300
±400
1
2
3
4
1.0
2.0
0.5
V
DD
– 2
300
60
3.5
1.3
2.6
3.9
5.2
1.4
0.4
0.8
+5
(V
DD
– 2)
V
V
kΩ
V/V
μA/V
μA
μA
mV
mV
mV
mV
mV
V
V
%
%
%
%
V
V
V
μA
V
Voltage on Pin 20
Voltage on Pin 23
V
SHRS
= 0.5 V, V
S
= 0.5 V
I
SCMP
= ±20 μA
V
SCMP
> 1 V
V
SCMP
< V
DD
– 1 V
Master/slave arbitration
SHRS = 2 V ± SHR
THRESH
Reg 04h[1:0] = 00. See Table 13.
Reg 04h[1:0] = 01. See Table 13.
Reg 04h[1:0] = 10. See Table 13.
Reg 04h[1:0] = 11. See Table 13.
Figure 10
V
CCMP
= 0.7 V, V
S
+ = 1.5 V
V
S
+ = 0 V, V
SCMP
= 0 V
V
SCMP
= 3.5 V.
Reg 10h[5:4] = 00. See Table 25.
Reg 10h[5:4] = 01. See Table 25.
Reg 10h[5:4] = 10. See Table 25.
Reg 10h[5:4] = 11. See Table 25.
Open-drain N-channel FET
I
IO
= 5 mA
I
IO
= 10 mA
V
CS
= FS
Voltage set by C
S
resistor divider.
Voltage on C
S
pin, T
A
= 25°C.
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