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參數(shù)資料
| 型號(hào)： | ADM708RAN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | ECONOLINE: REC3-S_DRW(Z)/H* - 3W DIP Package- 1kVDC Isolation- Wide Input 2:1 & 4:1- Regulated Output- 100% Burned In- UL94V-0 Package Material- Continuous Short Circiut Protection- Efficiency to 80% |
| 中文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大小： | 129K |
| 代理商： | ADM708RAN |
REV. A
–6–
ADM706P/R/S/T, ADM708R/S/T
V
MID
1.25
R
1
+
R
2
R
2
Valid RESET Below 1 V V
CC
The ADM70x family of products are guaranteed to provide a
valid reset level with V
CC
as low as 1 V. Please refer to the Typi-
cal Performance Characteristics. As V
CC
drops below 1 V, the
internal transistor will not have sufficient drive to hold it ON so
the voltage on
RESET
will no longer be held at 0 V. A pull-
down resistor as shown in Figure 7 may be connected externally
to hold the line low if it is required.
ADM70x
GND
RESET
R1
Figure 7.
RESET
Valid Below 1 V
Power-Fail Comparator
The power-fail comparator is an independent comparator which
may be used to monitor the input power supply. The compara-
tor’s inverting input is internally connected to a 1.25 V reference
voltage. The noninverting input is available at the PFI input.
This input may be used to monitor the input power supply via a
resistive divider network. When the voltage on the PFI input drops
below 1.25 V, the comparator output (
PFO
) goes low indicating
a power failure. For early warning of power failure the compara-
tor may be used to monitor the preregulator input simply by
choosing an appropriate resistive divider network. The
PFO
output
can be used to interrupt the processor so that a shutdown proce-
dure is implemented before the power is lost.
INPUT
POWER
R1
R2
POWER-FAIL
INPUT
1.25V
PFI
PFO
ADM70x
POWER-FAIL
OUTPUT
Figure 5. Power-Fail Comparator
Adding Hysteresis to the Power-Fail Comparator
For increased noise immunity, hysteresis may be added to the
power-fail comparator. Since the comparator circuit is nonin-
verting, hysteresis can be added simply by connecting a resistor
between the
PFO
output and the PFI input as shown in Figure
6. When
PFO
is low, resistor R3 sinks current from the sum-
ming junction at the PFI pin. When
PFO
is high, resistor R3
sources current into the PFI summing junction. This results in
differing trip levels for the comparator. Further noise immunity
may be achieved by connecting a capacitor between PFI and GND.
INPUT
POWER
R1
R2
1.25V
PFI
PFO
TO
m
P NMI
ADM70x
R3
ADM663A
+3.3V
V
CC
3.3V
PFO
0V
0V
V
L
V
IN
V
H
Figure 6. Adding Hysteresis to the Power-Fail
Comparator
V
H
=
1.25 1
+
R
2
+
R
3
R
2
×
R
3
R
1
V
L
=
1.25
+
R
1
1.25
R
2
–
V
CC
– 1.25
R
3
V
CC
RESET
400ms/DIV
Figure 8. ADM706/ADM708
RESET
Output Voltage vs.
Supply Voltage
V
CC
RESET
400ms/DIV
Figure 9. RESET Output Voltage vs. Supply Voltage
Typical Performance Characteristics
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