
Preliminary Technical Data
D
D
WB
R
)
(
(RDAC 0 and 1)
ADN2860
Page 13 of 15
W
R
AB
R
+
=
512
(1)
W
R
AB
R
D
D
WB
R
+
=
128
)
(
(RDAC 2 only)
(2)
Where D is the decimal equivalent of the data contained in the
RDAC register and R
W
is the wiper resistance.
The output resistance values in table 6 will be set for the
following RDAC latch codes with V
DD
= 5 V (applies to R
AB
=
25 k
Digital Potentiometers):
D
RWB
(D)
Output State
(DEC)
(
)
511
256
1
0
25001
12550
98.8
50
Full-Scale
Mid-Scale
1 LSB
Zero-Scale (Wiper contact resistance)
Table 6. R
WB
at Selected Codes for R
WB_FS
= 25 k
Note that in the zero-scale condition a finite wiper resistance of
50
is present. Care should be taken to limit the current flow
between W and B in this state to no more than 20mA to avoid
degradation or possible destruction of the internal switches.
Channel-to-channel R
WB
matching is better than 1%. The
change in RWB with temperature has a 35ppm/°C temperature
coefficient.
Like the mechanical potentiometer the RDAC replaces, the
ADN2860 parts are totally symmetrical. The resistance between
the wiper W and terminal A also produces a digitally controlled
complementary resistance R
WA
. When R
WA
is used, the B
terminal can be let floating or tied to the wiper. Setting the
resistance value for R
WA
starts at a maximum value of resistance
and decreases as the data loaded in the latch is increased in
value. The general transfer equation for this operation is:
D
D
WA
R
512
D
D
WA
R
128
For example, the following output resistance values will be set
for the following RDAC latch codes (applies to R
AB
=25 k
Digital Potentiometers):
D
R
WA
(D) Output State
(DEC)
(
)
W
R
AB
R
+
=
512
)
(
(RDAC 0 and 1) (3)
W
R
AB
R
+
=
128
)
(
(RDAC 2 only) (4)
511
128
1
0
98.8
12550
25001
25050
full-scale
Mid-scale
1 LSB
Zero-scale
Table 7. ADN2860. R
WA
(D) at selected codes for R
AB
= 25 k
.
The typical distribution of R
AB
from channel-to-channel
matches to ±0.2% within the same package. Device to device
matching is process lot dependent, with a worst case of ±30%
variation. Changes in R
AB
with temperature has a 35ppm/°C
temperature coefficient.
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer can be configured to generate an
output voltage at the wiper terminal, which is proportional to the
input voltages applied to terminals A and B. Connecting
terminal A to +5V and terminal B to ground produces an output
voltage at the wiper which can be any value starting at zero
volts up to +5V. Each LSB of voltage is equal to the voltage
applied across terminals A and B divided by the 2
N
position
resolution of the potentiometer divider.
Since ADN2860 can also be supplied by dual supplies, the
general equations defining the output voltage at V
W
with respect
to ground for any given input voltages applied to terminals A
and B are:
D
D
W
V
)
(
(RDAC 0 and 1)
B
V
AB
V
+
=
512
(5)
B
V
AB
V
D
D
W
V
+
=
128
)
(
(RDAC 2)
(6)
Equation 5 assumes V
W
is buffered so that the effect of wiper
resistance is nulled. Operation of the digital potentiometer in the
divider mode results in more accurate operation over
temperature. In this mode, the output voltage is dependent on
the ratio of the internal resistors not the absolute value,
therefore, the drift improves to 15ppm/°C. There is no voltage
polarity restriction between terminals A, B, and W as long as
the terminal voltage (V
TERM
) stays within V
SS
< V
TERM
< V
DD
.
APPLICATIONS
Laser Diode Driver (LDD) calibration
The ADN2860 can be used with any laser diode driver. Its high
resolution, compact footprint, and superior temperature drift
characteristics make it ideal for optical parameter setting.
The ADN2841 is a 2.7 Gbps laser diode driver that utilizes a
unique control algorithm to manage both the laser average
power and extinction ratio after initial factory calibration. It
stabilizes the laser data transmission by continuously
monitoring its optical power, and correcting the variations
caused by temperature and the laser degradation over time. In
ADN2841, the I
MPD
monitors the laser diode current. Through
its dual loop Power and Extinction Ratio control, calibrated by
ADN2860, the internal driver controls the bias current I
BIAS
and consequently the average power. It also regulates the
modulation current, I
MODP
by changing the modulation current
linearly with slope efficiency. Any changes in the laser
threshold current or slope efficiency are therefore
compensated. As a result, this optical supervisory system
minimizes the laser characterization efforts and therefore
REV. PrD