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參數資料
型號: ADP3808JCPZ-RL
廠商: ANALOG DEVICES INC
元件分類: 穩壓器
英文描述: High Efficiency Switch Mode Li-Ion Battery Charger
中文描述: BATTERY CHARGE CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, QCC24
封裝: ROHS COMPLIANT, MO-220VGGD-2, LFCSP-24
文件頁數: 11/16頁
文件大小: 315K
代理商: ADP3808JCPZ-RL
ADP3808
Rev. 0 | Page 11 of 16
0
+
3-/4-CELL
SELECTION
BOOTSTRAPPED
SYNCHRONOUS
DRIVER
V
IN
CSP
+
OSCILLATOR
L1
V
REF
+ V
REG
UVLO
BIAS
+
CSM
COMP
CHARGE
CURRENT
SETPOINT
BATTERY
VOLTAGE
ADJUST
AGND
CSADJ
BAT
EN
+
RT
SW
PGND
V
CC
BST
BATTERY
12.6V/16.8V
7.0V
C10
0.1μF
DRV
SYSP
SYSM
ISYS
LIMSET
LOGIC
CONTROL
LIMIT
SYSTEM
DC/DC
ADP3808
1/2 Q1
FD56990A
C15
22μF
C14
2.2μF
150k
R8
56
C8
0.22μF
C11
C16
22μF
C9
100nF
1/2 Q1
FD56990A
22μH
R
CS
20m
R4
510
R13
10
DRVREG
CELLSEL
DRVLSD
IN
EN
V
TH
DRVLSD
R2
510
+
+
+
C13
22μF
C1
2.2μF
R
SS
10m
+
DRVL
+
g
m
1
BAT
1V
SYSP
REFIN
+
+
g
m
2
R9
3.3V
R10
3.3V
R11
3.3V
R12
BATADJ
EXTPWR
Figure 16. Typical Application Circuit
FINAL BATTERY VOLTAGE CONTROL
As the battery approaches its final voltage, the ADP3808
switches from CC mode to CV mode. The change is achieved
by the common output node of g
m
1 and g
m
2. Only one of the
two outputs controls the voltage at the COMP pin. Both
amplifiers can only pull down on COMP, such that when either
amplifier has a positive differential input voltage, its output is
not active. For example, when the battery voltage, V
BAT
, is low,
g
m
2 does not control VCOMP. When the battery voltage reaches
the desired final voltage, g
m
2 takes control of the loop, and the
charge current is reduced.
Amplifier g
m
2 compares the battery voltage to a programmable
level set by pins BATADJ and REFIN. The target battery voltage
is dependent on the state of the CELLSEL pin as CELLSEL sets
the number of cells to be charged. Pulling CELLSEL high sets
the ADP3808 to charge three cells. When CELLSEL is tied to
ground, four cells are selected. CELLSEL has a 2 μA pull-up
current as a fail-safe to select three cells when it is left open.
The final battery voltage is programmable from 4.0 V to 4.5 V
per cell. The programming voltage is applied to the BATADJ pin
and is ratioed to the REFIN pin. The battery voltage V
BAT
is set
according to Equation 2 and Equation 3.
For CELLSEL > 2 V:
BATADJ
V
BAT
V
5
V
12
REFIN
+
=
(2)
For CELLSEL < 0.8 V:
REFIN
BATADJ
V
BAT
V
2
V
16
+
=
(3)
OSCILLATOR AND PWM
The oscillator generates a triangle waveform between 1 V and
2 V, which is compared to the voltage at the COMP pin, setting
the duty cycle of the driver stage. When V
COMP
is below 1.0 V,
the duty cycle is zero. Above 2.0 V, the duty cycle reaches its
maximum. The oscillator frequency is set by the external
resistor at the RT pin, R
OSC
, and is given by Equation 4.
OSC
OSC
R
f
9
10
41
×
=
(4)
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