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參數資料
型號: ADSP-21060
廠商: Analog Devices, Inc.
英文描述: ADSP-2106x SHARC DSP Microcomputer Family
中文描述: 的ADSP - 2106x SHARC處理器DSP的微機家庭
文件頁數: 13/47頁
文件大小: 366K
代理商: ADSP-21060
ADSP-21060–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS (5 V)
K Grade
Parameter
Test Conditions
Min
Max
Units
V
DD
T
CASE
V
IH1
V
IH2
V
IL
Supply Voltage
Case Operating Temperature
High Level Input Voltage
1
High Level Input Voltage
2
Low Level Input Voltage
1, 2
4.75
0
2.0
2.2
–0.5
5.25
+85
V
DD
+ 0.5
V
DD
+ 0.5
0.8
V
°
C
V
V
V
@ V
DD
= max
@ V
DD
= max
@ V
DD
= min
NOTES
1
Applies to input and bidirectional pins: DATA
47-0
, ADDR
31-0
,
RD
,
WR
,
SW
,
ACK
,
SBTS
,
IRQ
2-0
, FLAG
3-0
,
HBG
,
CS
,
DMAR1
,
DMAR2
,
BR
6-1
, ID
2-0
, RPBA,
CPA
, TFS0, TFS1, RFS0, RFS1, LxDAT
3-0
, LxCLK, LxACK, EBOOT, LBOOT,
BMS
, TMS, TDI, TCK,
HBR
, DR0, DR1, TCLK0, TCLK1, RCLK0, RCLK1.
2
Applies to input pins: CLKIN,
RESET
,
TRST
.
ELECTRICAL CHARACTERISTICS (5 V)
Parameter
Test Conditions
@ V
DD
= min, I
OH
= –2.0 mA
2
@ V
DD
= min, I
OL
= 4.0 mA
2
@ V
DD
= max, V
IN
= V
DD
max
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= V
DD
max
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= V
DD
max
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= 1.5 V
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= 0 V
f
IN
= 1 MHz, T
CASE
= 25
°
C, V
IN
= 2.5 V
Min
Max
Units
V
OH
V
OL
I
IH
I
IL
I
ILP
I
OZH
I
OZL
I
OZHP
I
OZLC
I
OZLA
I
OZLAR
I
OZLS
C
IN
High Level Output Voltage
1
Low Level Output Voltage
1
High Level Input Current
3, 4
Low Level Input Current
3
Low Level Input Current
4
Three-State Leakage Current
5, 6, 7, 8
Three-State Leakage Current
5, 9
Three-State Leakage Current
9
Three-State Leakage Current
7
Three-State Leakage Current
10
Three-State Leakage Current
8
Three-State Leakage Current
6
Input Capacitance
11, 12
4.1
V
V
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
mA
μ
A
mA
μ
A
pF
0.4
10
10
150
10
10
350
1.5
350
4.2
150
4.7
NOTES
1
Applies to output and bidirectional pins: DATA
47-0
, ADDR
31-0
,
MS
3-0
,
RD
,
WR
, PAGE, ADRCLK,
SW
, ACK, FLAG
3-0
, TIMEXP,
HBG
, REDY,
DMAG1
,
DMAG2
,
BR
6-1
,
CPA
, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT
3-0
, LxCLK, LxACK,
BMS
, TDO,
EMU
, ICSA.
1
2
See “Output Drive Currents” for typical drive current capabilities.
1
3
Applies to input pins:
SBTS
,
IRQ
2-0
,
HBR
,
CS
,
DMAR1
,
DMAR2
, ID
2-0
, RPBA, EBOOT, LBOOT, CLKIN,
RESET
, TCK.
1
4
Applies to input pins with internal pull-ups: DR0, DR1,
TRST
, TMS, TDI.
1
5
Applies to three-statable pins: DATA
47-0
, ADDR
31-0
,
MS
3-0
,
RD
,
WR
, PAGE, ADRCLK,
SW
, ACK, FLAG
3-0
, REDY,
HBG
,
DMAG1
,
DMAG2
,
BMS
,
BR
6–1
,
TFS
X
, RFS
X
, TDO,
EMU
. (Note that ACK is pulled up internally with 2 k
during reset in a multiprocessor system, when ID
2-0
= 001 and another ADSP-21060 is
not requesting bus mastership.)
1
6
Applies to three-statable pins with internal pull-ups: DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1.
1
7
Applies to
CPA
pin.
1
8
Applies to ACK pin when pulled up. (Note that ACK is pulled up internally with 2 k
during reset in a multiprocessor system, when ID
2-0
= 001 and another
ADSP-21060 is not requesting bus mastership).
1
9
Applies to three-statable pins with internal pull-downs: LxDAT
3-0
, LxCLK, LxACK.
10
Applies to ACK pin when keeper latch enabled.
11
Applies to all signal pins.
12
Guaranteed but not tested.
Specifications subject to change without notice.
ADSP-21060/ADSP-21060L
REV. D
–13–
相關PDF資料
PDF描述
ADSP-21060L ADSP-2106x SHARC DSP Microcomputer Family
ADSP-21060LAB-160 ADSP-2106x SHARC DSP Microcomputer Family
ADSP-21060KS-133 ADSP-2106x SHARC DSP Microcomputer Family
ADSP-21060KS-160 ADSP-2106x SHARC DSP Microcomputer Family
ADSP-21060LKB-160 RES, 2.2 K SM CHIP 5% 50V 1/16 WATT, 0603
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