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參數資料
| 型號： | ADSP-21262SKSTZ200 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | SHARC Processor |
| 中文描述： | 16-BIT, 66.67 MHz, OTHER DSP, PQFP144 |
| 封裝： | LEAD FREE, MS-026BFB, LQFP-144 |
| 文件頁數： | 10/44頁 |
| 文件大小： | 1295K |
| 代理商： | ADSP-21262SKSTZ200 |
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Rev. A
|
Page 10 of 44
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May 2004
ADSP-21262
the application. Publish component archives from within
VisualDSP++. VCSE supports component implementation in
C/C++ or assembly language.
Use the Expert Linker to visually manipulate the placement of
code and data on the embedded system. View memory utiliza-
tion in a color-coded graphical form, easily move code and data
to different areas of the DSP or external memory with the drag
of the mouse, examine run time stack and heap usage. The
Expert Linker is fully compatible with the existing Linker Defi-
nition File (LDF), allowing the developer to move between the
graphical and textual environments.
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the SHARC processor family. Hard-
ware tools include SHARC processor PC plug-in cards. Third
party software tools include DSP libraries, real-time operating
systems, and block diagram design tools.
DESIGNING AN EMULATOR-COMPATIBLE DSP
BOARD (TARGET)
The Analog Devices family of emulators are tools that every
DSP developer needs to test and debug hardware and software
systems. Analog Devices has supplied an IEEE 1149.1 JTAG
Test Access Port (TAP) on each JTAG DSP. Nonintrusive in-
circuit emulation is assured by the use of the processor’s JTAG
interface—the emulator does not affect target system loading or
timing. The emulator uses the TAP to access the internal fea-
tures of the DSP, allowing the developer to load code, set
breakpoints, observe variables, observe memory, and examine
registers. The DSP must be halted to send data and commands,
but once an operation has been completed by the emulator, the
DSP system is set running at full speed with no impact on sys-
tem timing.
To use these emulators, the target board must include a header
that connects the DSP’s JTAG port to the emulator.
For details on target board design issues including mechanical
layout, single processor connections, multiprocessor scan
chains, signal buffering, signal termination, and emulator pod
logic, see the
EE-68: Analog Devices JTAG Emulation Technical
Reference
www.analog.com)—
to keep pace with improvements to emulator support.ADDITIONAL INFORMATION
This data sheet provides a general overview of the ADSP-21262
architecture and functionality. For detailed information on the
ADSP-2126x family core architecture and instruction set, refer
to the
ADSP-2126x DSP Core Manual
and the ADSP-21160
SHARC DSP Instruction Set Reference.
相關PDF資料 |
PDF描述 |
|---|---|
| ADSP-21262 | SHARC Processor |
| ADSP-21262SKBC-200 | SHARC Processor |
| ADSP-21262SKBCZ200 | SHARC Processor |
| ADSP-21266 | SHARC Embedded Processor |
| ADSP-21266SKBC-2B | SHARC Embedded Processor |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADSP-21262SKSTZ200 | 制造商:Analog Devices 功能描述:IC 32-BIT DSP |
| ADSP-21266 | 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Embedded Processor |
| ADSP-21266_07 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Embedded Processor |
| ADSP-21266KSTZ-1C | 制造商:Analog Devices 功能描述:- Trays |
| ADSP-21266KSTZ-2C | 制造商:Analog Devices 功能描述:- Trays |
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