欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號: ADSP-21366SKSQZENG
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號處理
英文描述: SHARC Processor
中文描述: 16-BIT, 55.55 MHz, OTHER DSP, PQFP144
封裝: LEAD FREE, MS-026BFB-HD, HSLQFP-144
文件頁數(shù): 18/54頁
文件大小: 559K
代理商: ADSP-21366SKSQZENG
Rev. PrA
|
Page 18 of 54
|
September 2004
ADSP-21365/6
Preliminary Technical Data
Power-Up Sequencing
The timing requirements for processor startup are given in
Table 10
.
Table 10. Power Up Sequencing Timing Requirements (Processor Startup)
Parameter
Timing Requirements
t
RSTVDD
t
IVDDEVDD
t
CLKVDD
1
t
CLKRST
t
PLLRST
Min
Max
Unit
RESET Low Before V
DDINT
/V
DDEXT
on
V
DDINT
on Before V
DDEXT
CLKIN Valid After V
DDINT
/V
DDEXT
Valid
CLKIN Valid Before RESET Deasserted
PLL Control Setup Before RESET Deasserted
0
–50
0
10
2
20
3
ns
ms
ms
μs
μs
200
200
Switching Characteristic
t
CORERST
1
Valid V
DDINT
/V
DDEXT
assumes that the supplies are fully ramped to their 1.2 and 3.3 volt rails. Voltage ramp rates can vary from microseconds to hundreds of milliseconds
depending on the design of the power supply subsystem.
2
Assumes a stable CLKIN signal, after meeting worst-case startup timing of crystal oscillators. Refer to your crystal oscillator manufacturer's datasheet for startup time.
Assume a 25 ms maximum oscillator startup time if using the XTAL pin and internal oscillator circuit in conjunction with an external crystal.
3
Based on CLKIN cycles
4
Applies after the power-up sequence is complete. Subsequent resets require a minimum of 4 CLKIN cycles for RESET to be held low in order to properly initialize and
propagate default states at all I/O pins.
5
The 4096 cycle count depends on t
SRST
specification in
Table 12
. If setup time is not met, 1 additional CLKIN cycle may be added to the core reset time, resulting in 4097
cycles maximum.
Core Reset Deasserted After RESET Deasserted
4096t
CK
+ 2 t
CCLK
4, 5
Figure 6. Power-Up Sequencing
CLKIN
RESET
t
RSTVDD
RSTOUT
VDDEXT
VDDINT
t
PLLRST
t
CLKRST
t
CLKVDD
t
IVDDEVDD
CLK_CFG1-0
t
CORERST
相關(guān)PDF資料
PDF描述
ADSP-21365SKSQ-ENG SHARC Processor
ADSP-21366SBSQ-ENG SHARC Processor
ADSP-21366SCSQ-ENG SHARC Processor
ADSP-21366 Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection
ADSP-21366SKBC-ENG Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-21366WBBCZ-1A 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor
ADSP-21366YSWZ-2AA 功能描述:IC DSP 32BIT 200MHZ EPAD 144LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號處理器) 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI,以太網(wǎng),RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA(20x20) 包裝:托盤
ADSP-21367 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processors
ADSP-21367_06 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processors
ADSP-21367_08 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processors
主站蜘蛛池模板: 武安市| 合水县| 昭平县| 玉树县| 灯塔市| 永兴县| 临夏市| 黔西县| 台北市| 东兴市| 和平区| 临西县| 天峨县| 专栏| 黄梅县| 宝兴县| 宽城| 克东县| 永平县| 奈曼旗| 韶关市| 麻江县| 苏尼特左旗| 武邑县| 乐业县| 安乡县| 天柱县| 隆安县| 屯昌县| 古丈县| 伊川县| 阳新县| 牡丹江市| 镇坪县| 九龙县| 商河县| 尼勒克县| 眉山市| 伊春市| 博乐市| 阆中市|