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參數(shù)資料
| 型號： | ADSP-2173BST-80 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | 24-BIT, 10 MHz, OTHER DSP, PQFP128 |
| 封裝： | PLASTIC, TQFP-128 |
| 文件頁數(shù)： | 29/52頁 |
| 文件大小： | 664K |
| 代理商： | ADSP-2173BST-80 |
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ADSP-2171/ADSP-2172/ADSP-2173
REV. A
–29–
ADSP-2171/ADSP-2172
E NVIRONME NT AL CONDIT IONS
Ambient T emperature Rating:
T
AMB
= T
CASE
– (PD
×
θ
C A
)
T
CASE
= Case T emperature in
°
C
PD = Power Dissipation in W
θ
C A
= T hermal Resistance (Case-to-Ambient)
θ
JA
= T hermal Resistance (Junction-to-Ambient)
θ
JC
= T hermal Resistance (Junction-to-Case)
Package
θ
JA
θ
JC
θ
CA
T QFP
PQFP
50
°
C/W
41
°
C/W
2
°
C/W
10
°
C/W
48
°
C/W
31
°
C/W
POWE R DISSIPAT ION
T o determine total power dissipation in a specific application,
the following equation should be applied for each output:
C
×
V
DD
2
×
f
C
= load capacitance,
f
= output switching frequency.
E xample:
In an application where external data memory is used and no
other outputs are active, power dissipation is calculated as
follows:
Assumptions:
External data memory is accessed every cycle with 50% of the
address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
T he application operates at V
DD
= 5.0 V and t
CK
= 30 ns.
Total Power Dissipation
=
P
INT
+
(C
×
V
DD2
×
f
)
P
INT
= internal power dissipation from Power vs. Frequency
graph (Figure 18).
(
C
×
V
DD2
×
f
) is calculated for each output:
# of
Pins
×
C
×
V
DD2
×
f
Address,
DMS
Data Output,
WR
RD
CLK OUT
8
9
1
1
×
10 pF
×
10 pF
×
10 pF
×
10 pF
×
5
2
V
×
5
2
V
×
5
2
V
×
5
2
V
×
33.3 MHz
×
16.67 MHz =
×
16.67 MHz =
×
33.3 MHz
=
66.6 mW
37.5 mW
4.2 mW
8.3 mW
116.6 mW
=
T otal power dissipation for this example is P
INT
+ 116.6 mW.
VALID FOR ALL TEMPERATURE GRADES.
1
POWER REFLECTS DEVICE OPERATING WITH NO OUTPUT LOADS.
2
IDLE REFERS TO ADSP-2171 STATE OF OPERATION DURING
EXECUTION OF IDLE INSTRUCTION. DEASSERTED PINS ARE
DRIVEN TO EITHER V
OR GND. POWER REFLECTS DEVICE
OPERATING WITH CLKOUT DISABLED.
3
TYPICAL POWER DISSIPATION AT 5.0V V
DURING EXECUTION
OF IDLE N INSTRUCTION (CLOCK FREQUENCY REDUCTION).
POWER REFLECTS DEVICE OPERATING WITH CLKOUT DISABLED.
POWER, INTERNAL
V
DD
= 4.5V
186mW
382mW
229mW
148mW
110mW
27
23
21
19
17
15
25
13
31
29
33
V
DD
= 5.0V
V
DD
= 5.5V
225
175
200
300
250
275
325
375
350
400
150
125
301mW
P
I
)
1
/
t
CK
– MHz
P
I
)
POWER, IDLE
50
40
45
65
55
60
70
80
75
85
35
30
27
23
21
19
17
15
25
13
31
29
33
1
/
t
CK
– MHz
48mW
37mW
26mW
82mW
48mW
64mW
V
DD
= 4.5V
V
DD
= 5.0V
V
DD
= 5.5V
IDLE;
IDLE (16)
IDLE (128)
27
23
21
19
17
15
25
13
31
29
33
1
/
t
CK
– MHz
P
I
)
POWER, IDLE n MODES
82mW
20mW
37mW
23mW
31mW
64mW
44
36
40
56
48
52
60
68
64
72
32
28
24
20
16
28mW
3
1, 2
1
Figure 18. Power vs. Frequency
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