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參數資料
型號: ADSP-21990BBC
廠商: ANALOG DEVICES INC
元件分類: 數字信號處理
英文描述: 16-bit fixed point DSP with Flash
中文描述: 16-BIT, 150 MHz, OTHER DSP, PBGA196
封裝: MINI, BGA-196
文件頁數: 13/44頁
文件大小: 574K
代理商: ADSP-21990BBC
–13–
REV. 0
ADSP-21990
Booting Modes
The ADSP-21990 supports a number of different boot modes
that are controlled by the three dedicated hardware boot mode
control pins (BMODE2, BMODE1, and BMODE0). The use
of three boot mode control pins means that up to eight different
boot modes are possible. Of these only five modes are valid on
the ADSP-21990. The ADSP-21990 exposes the boot
mechanism to software control by providing a nonmaskable boot
interrupt that vectors to the start of the on-chip ROM memory
block (at address 0xFF0000). A boot interrupt is automatically
initiated following either a hardware initiated reset, via the
RESET
pin, or a software initiated reset, via writing to the
Software Reset register. Following either a hardware or a software
reset, execution always starts from the boot ROM at address
0xFF0000, irrespective of the settings of the BMODE2,
BMODE1, and BMODE0 pins. The dedicated BMODE2,
BMODE1, and BMODE0 pins are sampled at hardware reset.
The particular boot mode for the ADSP-21990 associated with
the settings of the BMODE2, BMODE1, BMODE0 pins is
defined in
Table 3
.
Instruction Set Description
The ADSP-21990 assembly language instruction set has an
algebraic syntax that was designed for ease of coding and read-
ability. The assembly language, which takes full advantage of the
unique architecture of the processor, offers the following benefits:
ADSP-219x assembly language syntax is a superset of and
source code compatible (except for two data registers and
DAG base address registers) with ADSP-21xx family
syntax. It may be necessary to restructure ADSP-21xx
programs to accommodate the ADSP-21990 unified
memory space and to conform to its interrupt vector map.
The algebraic syntax eliminates the need to remember
cryptic assembler mnemonics. For example, a typical
arithmetic add instruction, such as AR = AX0 + AY0,
resembles a simple equation.
Every instruction, but two, assembles into a single, 24-bit
word that can execute in a single instruction cycle. The
exceptions are two dual word instructions. One writes
16-bit or 24-bit immediate data to memory, and the other
is an absolute jump/call with the 24-bit address specified
in the instruction.
Multifunction instructions allow parallel execution of an
arithmetic, MAC, or shift instruction with up to two
fetches or one write to processor memory space during a
single instruction cycle.
Program flow instructions support a wider variety of con-
ditional and unconditional jumps/calls and a larger set of
conditions on which to base execution of conditional
instructions.
Development Tools
The ADSP-21990 is supported with a complete set of
CROSSCORE software and hardware development tools,
including Analog Devices emulators and VisualDSP++ devel-
opment environment. The emulator hardware that supports
other ADSP-219x DSPs also fully emulates the ADSP-21990.
The VisualDSP++ project management environment lets pro-
grammers develop and debug an application. This environment
includes an easy to use assembler (which is based on an algebraic
syntax), an archiver (librarian/library builder), a linker, a loader,
a cycle-accurate instruction-level simulator, a C/C++ compiler,
and a C/C++ runtime library that includes DSP and mathemat-
ical functions. A key point for these tools is C/C++ code
efficiency. The compiler has been developed for efficient transla-
tion of C/C++ code to DSP assembly. The DSP has architectural
features that improve the efficiency of compiled C/C++ code.
The VisualDSP++ debugger has a number of important features.
Data visualization is enhanced by a plotting package that offers
a significant level of flexibility. This graphical representation of
user data enables the programmer to quickly determine the per-
formance of an algorithm. As algorithms grow in complexity, this
capability can have significant influence on the design develop-
ment schedule, increasing productivity. Statistical profiling
enables the programmer to nonintrusively poll the processor as
it is running the program. This feature, unique to VisualDSP++,
enables the software developer to passively gather important code
execution metrics without interrupting the real-time characteris-
tics of the program. Essentially, the developer can identify
bottlenecks in software quickly and efficiently. By using the
profiler, the programmer can focus on those areas in the program
that impact performance and take corrective action.
Table 3. Summary of Boot Modes
Boot Mode
0
1
2
3
4
5
6
7
BMODE2
0
0
0
0
1
1
1
1
BMODE1
0
0
1
1
0
0
1
1
BMODE0
0
1
0
1
0
1
0
1
Function
Illegal – Reserved
Boot from External 8-bit Memory over EMI
Execute from External 8-bit Memory
Execute from External 16-bit Memory
Boot from SPI
4K bits
Boot from SPI
>
4K bits
Illegal – Reserved
Illegal – Reserved
相關PDF資料
PDF描述
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相關代理商/技術參數
參數描述
ADSP-21990BST 制造商:Rochester Electronics LLC 功能描述:160 MIPS,MIXED SIGNAL DSP WITH 14BIT - Tape and Reel
ADSP-21990BSTZ 功能描述:IC DSP CONTROLLER 16BIT 176-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP(數字式信號處理器) 系列:ADSP-21xx 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI,以太網,RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA,FCBGA 供應商設備封裝:431-FCPBGA(20x20) 包裝:托盤
ADSP-21991BBC 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 150MHz 150MIPS 196-Pin Mini-BGA
ADSP-21991BBCZ 功能描述:IC DSP CTLR 16BIT 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP(數字式信號處理器) 系列:ADSP-21xx 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI,以太網,RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA,FCBGA 供應商設備封裝:431-FCPBGA(20x20) 包裝:托盤
ADSP-21991BST 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 160MHz 160MIPS 176-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:HIGH PERFORMANCE MIXED SIGNAL DSP - Bulk
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