- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374037 > ADSP2186 (Analog Devices, Inc.) DSP Microcomputer PDF資料下載
參數(shù)資料
| 型號(hào)： | ADSP2186 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | DSP微機(jī) |
| 文件頁(yè)數(shù)： | 10/32頁(yè) |
| 文件大小： | 293K |
| 代理商： | ADSP2186 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)當(dāng)前第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)
ADSP-2186
–10–
REV. 0
Bootstrap Loading (Booting)
T he ADSP-2186 has two mechanisms to allow automatic load-
ing of the internal program memory after reset. T he method for
booting is controlled by the Mode A, B and C configuration bits
as shown in T able VI. T hese four states can be compressed into
two-state bits by allowing an IDMA boot with Mode C = 1.
However, three bits are used to ensure future compatibility with
parts containing internal program memory ROM.
BDMA Booting
When the MODE pins specify BDMA booting, the ADSP-2186
initiates a BDMA boot sequence when
RESET
is released.
T able VI. Boot Summary T able
MODE C MODE B MODE A Booting Method
0
0
0
BDMA feature is used to load
the first 32 program memory
words from the byte memory
space. Program execution is
held off until all 32 words
have been loaded. Chip is
configured in Full Memory
Mode.
0
1
0
No Automatic boot opera-
tions occur. Program execu-
tion starts at external memory
location 0. Chip is config-
ured in Full Memory Mode.
BDMA can still be used but
the processor does not auto-
matically use or wait for these
operations.
1
0
0
BDMA feature is used to load
the first 32 program memory
words from the byte memory
space. Program execution is
held off until all 32 words
have been loaded. Chip is
configured in Host Mode.
Additional interface hardware
is required.
1
0
1
IDMA feature is used to load
any internal memory as de-
sired. Program execution is
held off until internal pro-
gram memory location 0 is
written to. Chip is configured
in Host Mode.
T he BDMA interface is set up during reset to the following de-
faults when BDMA booting is specified: the BDIR, BMPAGE,
BIAD and BEAD registers are set to 0; the BT YPE register is
set to 0 to specify program memory 24 bit words; and the
BWCOUNT register is set to 32. T his causes 32 words of on-
chip program memory to be loaded from byte memory. T hese
32 words are used to set up the BDMA to load in the remaining
program code. T he BCR bit is also set to 1, which causes pro-
gram execution to be held off until all 32 words are loaded into
on-chip program memory. Execution then begins at address 0.
T he ADSP-2100 Family development software (Revision 5.02
and later) fully supports the BDMA booting feature and can
generate byte memory space compatible boot code.
T he IDLE instruction can also be used to allow the processor to
hold off execution while booting continues through the BDMA
interface. For BDMA accesses while in Host Mode, the ad-
dresses to boot memory must be constructed externally to the
ADSP-2186. T he only memory address bit provided by the
processor is A0.
IDMA Port Booting
T he ADSP-2186 can also boot programs through its Internal
DMA port. If Mode C = 1, Mode B = 0, and Mode A = 1, the
ADSP-2186 boots from the IDMA port. IDMA feature can load
as much on-chip memory as desired. Program execution is held
off until on-chip program memory location 0 is written to.
Bus Request & Bus Grant
T he ADSP-2186 can relinquish control of the data and address
buses to an external device. When the external device requires
access to memory, it asserts the bus request (BR) signal. If the
ADSP-2186 is not performing an external memory access, it
responds to the active BR input in the following processor cycle
by:
T hree-stating the data and address buses and the
PMS
,
DMS
,
BMS
,
CMS
,
IOMS
,
RD
,
WR
output drivers,
Asserting the bus grant (
BG
) signal, and
Halting program execution.
If Go Mode is enabled, the ADSP-2186 will not halt program
execution until it encounters an instruction that requires an
external memory access.
If the ADSP-2186 is performing an external memory access
when the external device asserts the
BR
signal, then it will not
three-state the memory interfaces or assert the
BG
signal until
the processor cycle after the access completes. T he instruction
does not need to be completed when the bus is granted. If a
single instruction requires two external memory accesses, the
bus will be granted between the two accesses.
When the
BR
signal is released, the processor releases the
BG
signal, reenables the output drivers and continues program
execution from the point where it stopped.
T he bus request feature operates at all times, including when
the processor is booting and when
RESET
is active.
T he
BGH
pin is asserted when the ADSP-2186 is ready to
execute an instruction but is stopped because the external bus is
already granted to another device. T he other device can release
the bus by deasserting bus request. Once the bus is released, the
ADSP-2186 deasserts
BG
and
BGH
and executes the external
memory access.
Flag I/O Pins
T he ADSP-2186 has eight general purpose programmable input/
output flag pins. T hey are controlled by two memory mapped
registers. T he PFT Y PE register determines the direction,
1 = output and 0 = input. T he PFDAT A register is used to read
and write the values on the pins. Data being read from a pin
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADT14 | Circular Connector; No. of Contacts:61; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:25-61 |
| ADT14GP | Circular Connector; No. of Contacts:61; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:25-61 |
| ADT14GS | Circular Connector; No. of Contacts:61; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:25-61 |
| ADT7460 | dB COOL?? Remote Thermal Controller and Fan Controller |
| ADT7460ARQ | dB COOL?? Remote Thermal Controller and Fan Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-2186 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2186_01 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2186BCA-160 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2186BST-115 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 28.8MHz 28.8MIPS 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:DSP,5V,28MHZ,16K WORD RAM, 100TQFP - Bulk 制造商:Analog Devices 功能描述:IC MICROCOMPUTER 16-BIT |
| ADSP-2186BST-133 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 33.3MHz 33.3MIPS 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:DSP,5V,33MHZ,16K WORD RAM, 100TQFP - Bulk 制造商:Analog Devices 功能描述:IC MICROCOMPUTER 16-BIT |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。