
REV. 0
–10–
ADT7460
The peripheral whose address corresponds to the transmitted
address responds by pulling the data line low during the low
period before the ninth clock pulse, known as the Acknowledge
Bit. All other devices on the bus now remain idle while the
selected device waits for data to be read from or written to it. If
the R/
W
bit is a 0, then the master will write to the slave device.
If the R/
W
bit is a 1, the master will read from the slave device.
2.Data is sent over the serial bus in sequences of nine clock pulses,
eight bits of data followed by an Acknowledge Bit from the slave
device. Transitions on the data line must occur during the low
period of the clock signal and remain stable during the high
period, as a low to high transition when the clock is high may
be interpreted as a STOP signal. The number of data bytes
that can be transmitted over the serial bus in a single READ
or WRITE operation is limited only by what the master and
slave devices can handle.
3.When all data bytes have been read or written, stop conditions
are established. In WRITE mode, the master will pull the
data line high during the tenth clock pulse to assert a STOP
condition. In READ mode, the master device will override
the acknowledge bit by pulling the data line high during the
low period before the ninth clock pulse. This is known as
No Acknowledge. The master will then take the data line low
during the low period before the tenth clock pulse, then high
during the tenth clock pulse to assert a STOP condition.
Any number of bytes of data may be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
In the case of the ADT7460, write operations contain either one
or two bytes, and read operations contain one byte and perform
the following functions:
To write data to one of the device data registers or read data
from it, the Address Pointer Register must be set so that the
correct data register is addressed, then data can be written into
that register or read from it. The first byte of a write operation
always contains an address that is stored in the Address Pointer
Register. If data is to be written to the device, then the write
operation contains a second data byte that is written to the
register selected by the Address Pointer Register.
This is illustrated in Figure 7. The device address is sent over
the bus followed by R/
W
being set to 0. This is followed by two
data bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the Address Pointer
Register. The second data byte is the data to be written to the
internal data register.
When reading data from a register, there are two possibilities:
1. If the ADT7460’s Address Pointer Register value is unknown
or not the desired value, it is first necessary to set it to the
correct value before data can be read from the desired data
register. This is done by performing a write to the ADT7460
as before, but only the data byte containing the register address
is sent as data is not to be written to the register. This is
shown in Figure 8.
A read operation is then performed consisting of the serial
bus address, R/
W
bit set to 1, followed by the data byte read
from the data register. This is shown in Figure 9.
2. If the Address Pointer Register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the Address Pointer
Register, so Figure 8 can be omitted.
Notes
1. It is possible to
read
a data byte from a data register without
first writing to the Address Pointer Register if the Address
Pointer Register is already at the correct value. However, it is
not possible to
write
data to a register without writing to the
Address Pointer Register because the first data byte of a
write is always written to the Address Pointer Register.
2. In Figures 7 to 9, the serial bus address is shown as the
default value 01011(A1)(A0), where A1 and A0 are set by
the Address Select Mode function previously defined.
3. In addition to supporting the Send Byte and Receive Byte
protocols, the ADT7460 also supports the Read Byte protocol
(see System Management Bus specifications Rev. 2.0 for
more information).
R/
W
0
SCL
SDA
1
0
1
1
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADT7460
STOP BY
MASTER
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS
BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
1
9
1
ACK. BY
ADT7460
9
Figure 8. Writing to the Address Pointer Register Only
R/
W
0
SCL
SDA
1
0
1
1
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
NO ACK. BY
MASTER
STOP BY
MASTER
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS
BYTE
FRAME 2
DATA BYTE FROM ADT7460
1
9
1
ACK. BY
ADT7460
9
Figure 9. Reading Data from a Previously Selected Register