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參數資料
| 型號： | ADUC7021BCP62 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU |
| 中文描述： | 32-BIT, FLASH, 45.5 MHz, MICROCONTROLLER, QCC40 |
| 封裝： | 6 X 6 MM, MO-220VJJD-2, LFCSP-40 |
| 文件頁數： | 56/80頁 |
| 文件大小： | 840K |
| 代理商： | ADUC7021BCP62 |
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ADuC702x Series
Preliminary Technical Data
Rev. PrB | Page 56 of 80
Network addressable UART mode
This mode allows connecting the MicroConverter on a 256-
node serial network, either as a hardware single-master or via
software in a multi-master network. Bit 7 of COMIEN1 (ENAM
bit) must be set to enable UART in network addressable mode.
Note that there is no parity check in this mode, the parity bit is
used for address.
Network addressable UART register definitions
Three additional register:
-
COMSCR:
8-bit scratch register used for temporary storage.
In network address mode, the least significant bit of the
scratch register is the transmitted network address control bit.
If set to 1, the device is transmitting an address. If cleared to
0, the device is transmitting data.
-
COMIEN1:
8-bit network enable register.
-
COMIID1:
8-bit network interrupt register. Bit 7 to 4 are
reserved. See Table 45.
-
COMADR:
8-bit read and write network address register.
Holds the address the network addressable UART checks for.
On receiving this address the device interrupts the processor
and/or sets the appropriate status bit in COMIID1.
COMIEN1, COMIID1 and COMADR are used only in
network addressable UART mode.
Table 44: COMIEN1 MMR Bit Descriptions
Bit
7
Name
ENAM
Description
Network address mode Enable bit
set by user to enable network address mode
cleared by user to disable network address mode
9-bit transmit enable bit
Set by user to enable 9-bit transmit. ENAM must be set
Cleared by user to disable 9-bit transmit
9-bit receive enable bit
Set by user to enable 9-bit receive. ENAM must be set
Cleared by user to disable 9-bit receive
network interrupt Enable bit
Word length
Set for 9-bit data. E9BT has to be cleared.
Cleared for 8-bit data
Transmitter pin driver Enable bit
Set by user to enable SOUT pin as an output in slave mode or multi-master mode
Cleared by user, SOUT is three-state
Network address bit, interrupt polarity bit
Network address bit
Set by user to transmit the slave’s address
Cleared by user to transmit data
6
E9BT
5
E9BR
4
3
ENI
E9BD
2
ETD
1
0
NABP
NAB
Table 45: COMIID1 MMR Bit Descriptions
Definition
Bit 3-1
Status bits
000
110
101
011
010
001
000
Bit 0
NINT
1
0
0
0
0
0
0
priority
Clearing operation
2
3
1
2
3
4
No interrupt
Matching network address
Address transmitted, buffer empty
Receive line status interrupt
Receive buffer full interrupt
Transmit buffer empty interrupt
Modem status interrupt
Read COMRX
Write data to COMTX or read COMIID0
Read COMSTA0
Read COMRX
Write data to COMTX or read COMIID0
Read COMSTA1 register
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