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參數資料
| 型號： | ADV3000 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3:1 HDMI/DVI Switch with Equalization |
| 中文描述： | 3:1的HDMI / DVI接口與均衡開關 |
| 文件頁數： | 18/28頁 |
| 文件大小： | 608K |
| 代理商： | ADV3000 |
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ADV3000
AUXILIARY DEVICE MODES REGISTER
AUX_EN: Auxiliary (Low Speed) Switch Enable Bit
Table 8. AUX_EN Description
AUX_EN
Description
0
Auxiliary switch off, no low speed input/output to
low speed common input/output connection
1
Auxiliary switch on
Rev. 0 | Page 18 of 28
AUX_CH[1:0]: Auxiliary (Low Speed) Switch Source
Select Bus
Table 9. AUX_CH Mapping
AUX_CH[1:0]
AUX_COM[3:0]
00
AUX_A[3:0]
Description
Auxiliary Source A switched
to output
Auxiliary Source B switched
to output
Auxiliary Source C switched
to output
Illegal value
01
AUX_B[3:0]
10
AUX_C[3:0]
11
RECEIVER SETTINGS REGISTER
RX_TO: High Speed (TMDS) Channels Input Termination
On/Off Select Bit
Table 10. RX_TO Description
RX_TO
Description
0
Input termination off
1
Input termination on (can be pulsed on and off accord-
ing to settings in the input termination pulse register)
INPUT TERMINATION PULSE REGISTER 1 AND
REGISTER 2
RX_PT[X]: High Speed (TMDS) Input Channel X
Pulse-On-Source Switch Select Bit
Table 11. RX_PT[X] Description
RX_PT[X]
Description
0
Input termination for TMDS Channel X always
connected when source is switched
1
Input termination for TMDS Channel X
disconnected for 100 ms when source switched
Table 12. RX_PT[X] Mapping
RX_PT[X]
Corresponding Input TMDS Channel
Bit 0
B0
Bit 1
B1
Bit 2
B2
Bit 3
B3
Bit 4
A0
Bit 5
A1
Bit 6
A2
Bit 7
A3
Bit 8
C3
Bit 9
C2
Bit 10
C1
Bit 11
C0
RECEIVE EQUALIZER REGISTER 1 AND REGISTER 2
RX_EQ[X]: High Speed (TMDS) Input X Equalization Level
Select Bit
Table 13. RX_EQ[X] Description
RX_EQ[X]
Description
0
Low equalization (6 dB)
1
High equalization (12 dB)
Table 14. RX_EQ[X] Mapping
RX_EQ[X]
Corresponding Input TMDS Channel
Bit 0
B0
Bit 1
B1
Bit 2
B2
Bit 3
B3
Bit 4
A0
Bit 5
A1
Bit 6
A2
Bit 7
A3
Bit 8
C3
Bit 9
C2
Bit 10
C1
Bit 11
C0
TRANSMITTER SETTINGS REGISTER
TX_PE[1:0]: High Speed (TMDS) Output Pre-Emphasis
Level Select Bus (For All TMDS Channels)
Table 15. TX_PE[1:0] Description
TX_PE[1:0]
Description
00
No pre-emphasis (0 dB)
01
Low pre-emphasis (2 dB)
10
Medium pre-emphasis (4 dB)
11
High pre-emphasis (6 dB)
TX_PTO: High Speed (TMDS) Output Termination On/Off
Select Bit (For All Channels)
Table 16. TX_PTO Description
TX_PTO
Description
0
Output termination off
1
Output termination on
TX_OCL: High Speed (TMDS) Output Current Level Select
Bit (For All Channels)
Table 17. TX_OCL Description
TX_OCL
Description
0
Output current set to 10 mA
1
Output current set to 20 mA
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