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參數資料
| 型號： | ADV7178KS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | Integrated Digital CCIR-601 to PAL/NTSC Video Encoder |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP44 |
| 封裝： | PLASTIC, MO-112-AA-1, MQFP-44 |
| 文件頁數： | 23/38頁 |
| 文件大小： | 280K |
| 代理商： | ADV7178KS |
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ADV7177/ADV7178
–23–
REV. 0
Subaddress Register (SR7–SR0)
The communications register is an 8-bit write-only register.
After the part has been accessed over the bus, and a read/write
operation is selected, the subaddress is set up. The subaddress
register determines to/from which register the operation takes
place.
Figure 31 shows the various operations under the control of
the subaddress register. Zero should always be written to
SR7–SR6.
Register Select (SR5–SR0)
These bits are set up to point to the required starting address.
MODE REGISTER 0 MR0 (MR07–MR00)
(Address [SR4–SR0] = 00H)
Figure 32 shows the various operations under the control of Mode
Register 0. This register can be read from as well as written to.
MR0 BIT DESCRIPTION
Encode Mode Control (MR01–MR00)
These bits are used to set up the encode mode. The ADV7177/
ADV7178 can be set up to output NTSC, PAL (B, D, G, H, I)
and PAL (M) standard video.
Pedestal Control (MR02)
This bit specifies whether a pedestal is to be generated on
the NTSC composite video signal. This bit is invalid if the
ADV7177/ADV7178 is configured in PAL mode.
Luminance Filter Control (MR04–MR03)
The luminance filters are divided into two sets (NTSC/PAL) of
four filters, low-pass A, low-pass B, notch and extended. When
PAL is selected, bits MR03 and MR04 select one of four PAL
luminance filters; likewise, when NTSC is selected, bits MR03
and MR04 select one of four NTSC luminance filters. The
filters are illustrated in Figures 7 to 13.
SR4
SR3
SR2
SR1
SR0
SR7
SR6
SR5
SR5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
SR4 SR3 SR2 SR1 SR0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
0
0
1
0
0
1
1
0
1
1
0
1
1
0
1
1
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
ADV7178 SUBADDRESS REGISTER
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
" "
" "
1
MACROVISION REGISTER
MODE REGISTER 0
MODE REGISTER 1
SUBCARRIER FREQ REGISTER 0
SUBCARRIER FREQ REGISTER 1
SUBCARRIER FREQ REGISTER 2
SUBCARRIER FREQ REGISTER 3
SUBCARRIER PHASE REGISTER
TIMING REGISTER 0
CLOSED CAPTIONING EXTENDED DATA – BYTE 0
CLOSED CAPTIONING EXTENDED DATA – BYTE 1
CLOSED CAPTIONING DATA – BYTE 0
CLOSED CAPTIONING DATA – BYTE 1
TIMING REGISTER 1
MODE REGISTER 2
NTSC PEDESTAL CONTROL REG 0 (FIELD 1/3)
NTSC PEDESTAL CONTROL REG 1 (FIELD 1/3)
NTSC PEDESTAL CONTROL REG 2 (FIELD 2/4)
NTSC PEDESTAL CONTROL REG 3 (FIELD 2/4)
MODE REGISTER 3
MACROVISION REGISTER
ZERO SHOULD BE WRITTEN
TO THESE BITS
SR7–SR6 (00)
SR5
SR4 SR3 SR2 SR1 SR0
ADV7177 SUBADDRESS REGISTER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
MODE REGISTER 0
MODE REGISTER 1
SUBCARRIER FREQ REGISTER 0
SUBCARRIER FREQ REGISTER 1
SUBCARRIER FREQ REGISTER 2
SUBCARRIER FREQ REGISTER 3
SUBCARRIER PHASE REGISTER
TIMING REGISTER 0
CLOSED CAPTIONING EXTENDED DATA – BYTE 0
CLOSED CAPTIONING EXTENDED DATA – BYTE 1
CLOSED CAPTIONING DATA – BYTE 0
CLOSED CAPTIONING DATA – BYTE 1
TIMING REGISTER 1
MODE REGISTER 2
NTSC PEDESTAL CONTROL REG 0 (FIELD 1/3)
NTSC PEDESTAL CONTROL REG 1 (FIELD 1/3)
NTSC PEDESTAL CONTROL REG 2 (FIELD 2/4)
NTSC PEDESTAL CONTROL REG 3 (FIELD 2/4)
MODE REGISTER 3
OSD REGISTER
"
"
"
"
OSD REGISTER
Figure 31. Subaddress Register
MR01
MR00
MR07
MR02
MR04
MR03
MR05
MR06
OUTPUT VIDEO
STANDARD SELECTION
MR01 MR00
0
0
1
1
0
1
0
1
NTSC
PAL (B, D, G, H, I)
PAL (M)
RESERVED
MR07
(0)
ZERO SHOULD
BE WRITTEN TO
THIS BIT
OUTPUT SELECT
MR06
0
1
YC OUTPUT
RGB/YUV OUTPUT
FILTER SELECT
0
0
1
1
0
1
0
1
LOW-PASS FILTER (A)
NOTCH FILTER
EXTENDED MODE
LOW-PASS FILTER (B)
MR04 MR03
RGB SYNC
MR05
0
1
DISABLE
ENABLE
PEDESTAL CONTROL
MR02
0
1
PEDESTAL OFF
PEDESTAL ON
Figure 32. Mode Register 0 (MR0)
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相關代理商/技術參數 |
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|---|---|
| ADV7178KS-REEL | 制造商:Analog Devices 功能描述: |
| ADV7179 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
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| ADV7179BCP1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7179BCP-REEL | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 10-Bit 40-Pin LFCSP EP T/R |
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