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參數資料
| 型號： | ADV7191 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs |
| 中文描述： | 視頻編碼器與六10位DAC和DAC的輸出6視頻編碼器 |
| 文件頁數： | 46/69頁 |
| 文件大小： | 628K |
| 代理商： | ADV7191 |
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ADV7190/ADV7191
–46–
REV. 0
APPENDIX 2
CLOSED CAPTIONING
The ADV7190/ADV7191 supports closed captioning conforming
to the standard television synchronizing waveform for color
transmission. Closed captioning is transmitted during the
blanked active line time of Line 21 of the odd
fi
elds and Line
284 of even
fi
elds.
Closed captioning consists of a seven-cycle sinusoidal burst
that is frequency and phase locked to the caption data. After the
clock run-in signal, the blanking level is held for two data bits
and is followed by a Logic Level 1 start bit. Sixteen bits of data
follow the start bit. These consist of two eight-bit bytes, seven
data bits, and one odd parity bit. The data for these bytes is
stored in Closed Captioning Data Registers 0 and 1.
The ADV7190/ADV7191 also supports the extended closed
captioning operation that is active during even
fi
elds and is
encoded on Scan Line 284. The data for this operation is stored
in Closed Captioning Extended Data Registers 0 and 1.
All clock run-in signals and timing to support closed captioning on
Lines 21 and 284 are generated automatically by the ADV7190/
ADV7191 All pixel inputs are ignored during Lines 21 and 284
if closed captioning is enabled.
FCC Code of Federal Regulations (CFR) 47 Section 15.119
and EIA608 describe the closed captioning information for Lines
21 and 284.
The ADV7190/ADV7191 uses a single buffering method. This
means that the closed captioning buffer is only one byte deep,
therefore there will be no frame delay in outputting the closed
captioning data, unlike other two byte deep buffering systems.
The data must be loaded one line before (Line 20 or Line 283)
it is outputted on Line 21 and Line 284. A typical implementation
of this method is to use
VSYNC
to interrupt a microprocessor,
which in turn, will load the new data (two bytes) every
fi
eld. If
no new data is required for transmission, 0s must be inserted
in both data registers, this is called NULLING. It is also
important to load
control codes,
all of which are double bytes
on Line 21, or a TV will not recognize them. If there is a mes-
sage like
Hello World,
which has an odd number of characters, it
is important to pad it out to even in order to get
end of caption
2-byte control code to land in the same
fi
eld.
12.91 s
7 CYCLES
OF 0.5035 MHz
(CLOCK RUN-IN)
10.003 s
33.764 s
50 IRE
40 IRE
FREQUENCY = F
= 3.579545MHz
AMPLITUDE = 40 IRE
REFERENCE COLOR BURST
(9 CYCLES)
10.5 0.25 s
TWO 7-BIT + PARITY
ASCII CHARACTERS
(DATA)
27.382 s
S
T
A
R
T
P
A
R
I
T
Y
P
A
R
I
T
Y
D0
–
D6
D0
–
D6
BYTE 0
BYTE 1
Figure 89. Closed Captioning Waveform (NTSC)
相關PDF資料 |
PDF描述 |
|---|---|
| ADV7191KST | Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs |
| ADV7190 | Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs |
| ADV7192KST | Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs |
| ADV7192 | Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs |
| ADV7194KST | Professional Extended-10⑩ Video Encoder with 54 MHz Oversampling |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADV7191KST | 制造商:Analog Devices 功能描述:Video Encoder 6DAC 10-Bit 64-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:54M 4X STD DEF ENCODER NON-MACRO I.C. - Tape and Reel |
| ADV7191KSTZ | 制造商:Analog Devices 功能描述:Video Encoder 6DAC 10-Bit 64-Pin LQFP 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7192 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs |
| ADV7192KST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs |
| ADV7194 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Professional Extended-10⑩ Video Encoder with 54 MHz Oversampling |
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