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參數(shù)資料
| 型號(hào)： | ADV7191 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs |
| 中文描述： | 視頻編碼器與六10位DAC和DAC的輸出6視頻編碼器 |
| 文件頁(yè)數(shù)： | 49/69頁(yè) |
| 文件大?。?/td> | 628K |
| 代理商： | ADV7191 |
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ADV7190/ADV7191
–49–
REV. 0
Time, t
PD
,
is the time needed by the ADV7190/ADV7191 to
interpolate input data on TTX and insert it onto the CVBS
or Y outputs, such that it appears t
SYNTTXOUT
= 10.2
μ
s after the
leading edge of the horizontal signal. Time, TTX
DEL
, is the pipe-
line delay time by the source that is gated by the TTXREQ signal
in order to deliver TTX data.
With the programmability that is offered with TTXREQ signal
on the Rising/Falling edges, the TTX data is always inserted at
the correct position of 10.2
μ
s after the leading edge of Horizontal
Sync pulse, which enables a source interface with variable pipe-
line delays.
The width of the TTXREQ signal must always be maintained
so it allows the insertion of 360 (in order to comply with the
Teletext Standard PAL-WST) teletext bits at a text data rate of
6.9375 Mbits/s. This is achieved by setting TC03
–
TC00 to 0.
The insertion window is not open if the Teletext Enable bit
(MR34) is set to 0.
APPENDIX 5
TELETEXT INSERTION
Teletext Protocol
The relationship between the TTX bit clock (6.9375 MHz) and
the system CLOCK (27 MHz) for 50 Hz is given as follows:
(27
MHz
/4) = 6.75
MHz
(6.9375
×
10
6
/6.75
×
10
6
= 1.027777
Thus 37 TTX bits correspond to 144 clocks (27 MHz), each bit
has a width of almost four clock cycles. The ADV7190/ADV7191
uses an internal sequencer and variable phase interpolation
fi
lter
to minimize the phase jitter and thus generate a bandlimited
signal which can be output on the CVBS and Y outputs.
At the TTX input the bit duration scheme repeats after every
37 TTX bits or 144 clock cycles. The protocol requires that
TTX Bits 10, 19, 28, 37 are carried by three clock cycles, all
other bits by four clock cycles. After 37 TTX bits, the next bits
with three clock cycles are Bits 47, 56, 65, and 74. This scheme
holds for all following cycles of 37 TTX bits, until all 360 TTX
bits are completed. All teletext lines are implemented in the
same way. Individual control of teletext lines are controlled
by Teletext Setup Registers.
ADDRESS & DATA
RUN-IN CLOCK
TELETEXT VBI LINE
45 BYTES (360 BITS)
–
PAL
Figure 92. Teletext VBI Line
PROGRAMMABLE PULSE EDGES
t
PD
t
PD
CVBS/Y
HSYNC
TTXREQ
TTX
DATA
t
SYNTTXOUT
= 10.2 s
t
TTX
DEL
= TTXREQ TO TTX (PROGRAMMABLE RANGE = 4 BITS [0
–
15 CLOCK CYCLES])
TTX
DEL
TTX
ST
t
SYNTTXOUT
10.2 s
Figure 93. Teletext Functionality Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7191KST | Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs |
| ADV7190 | Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs |
| ADV7192KST | Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs |
| ADV7192 | Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs |
| ADV7194KST | Professional Extended-10⑩ Video Encoder with 54 MHz Oversampling |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7191KST | 制造商:Analog Devices 功能描述:Video Encoder 6DAC 10-Bit 64-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:54M 4X STD DEF ENCODER NON-MACRO I.C. - Tape and Reel |
| ADV7191KSTZ | 制造商:Analog Devices 功能描述:Video Encoder 6DAC 10-Bit 64-Pin LQFP 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7192 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs |
| ADV7192KST | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs |
| ADV7194 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Professional Extended-10⑩ Video Encoder with 54 MHz Oversampling |
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