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參數資料
型號: ADV7310KST
廠商: ANALOG DEVICES INC
元件分類: 顏色信號轉換
英文描述: Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
中文描述: COLOR SIGNAL ENCODER, PQFP64
封裝: PLASTIC, MS-026BCD, LQFP-64
文件頁數: 15/84頁
文件大小: 1099K
代理商: ADV7310KST
REV. A
ADV7310/ADV7311
–15–
PIN FUNCTION DESCRIPTIONS
Mnemonic
Input/Output
Function
DGND
AGND
CLKIN_A
CLKIN_B
G
G
I
I
Digital Ground.
Analog Ground.
Pixel Clock Input for HD (74.25 MHz Only, PS Only (27 MHz), SD Only (27 MHz).
Pixel Clock Input. Requires a 27 MHz reference clock for progressive scan mode or a 74.25 MHz
(74.1758 MHz) reference clock in HDTV mode. This clock is only used in dual modes.
Compensation Pin for DACs. Connect 0.1 F capacitor from COMP pin to V
AA
.
CVBS/Green/Y/Y Analog Output.
Chroma/Blue/U/Pb Analog Output.
Luma/Red/V/Pr Analog Output.
In SD Only Mode: CVBS/Green/Y Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Y/Green [HD] Analog Output.
In SD Only Mode: Luma/Blue/U Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Pr/Red Analog Output.
In SD Only Mode: Chroma/Red/V Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Pb/Blue [HD] Analog Output.
Video Horizontal Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
Video Vertical Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
Video Blanking Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
Video Blanking Control Signal for SD Only.
Video Horizontal Sync Control Signal for SD Only.
Video Vertical Sync Control Signal for SD Only.
SD or Progressive Scan/HDTV Input Port for Y Data. Input port for interleaved progressive scan
data. The LSB is set up on Pin Y0. For 8-bit data input, LSB is set up on Y2.
Progressive Scan/HDTV Input Port 4:4:4 Input Mode. This port is used for the Cb[Blue/U] data.
The LSB is set up on pin C0. For 8-bit data input, LSB is set up on C2.
SD or Progressive Scan/HDTV Input Port for Cr[Red/V] data in 4:4:4 input mode. LSB is set up
on pin S0. For 8-bit data input, LSB is set up on S2.
This input resets the on-chip timing generator and sets the ADV7310/ADV7311 into default register
setting.
RESET
is an active low signal.
A 3040
resistor must be connected from this pin to AGND and is used to control the amplitudes
of the DAC outputs.
I
2
C Port Serial Interface Clock Input.
I
2
C Port Serial Data Input/Output.
TTL Address Input. This signal sets up the LSB of the I
2
C address. When this pin is tied low,
the I
2
C filter is activated, which reduces noise on the I
2
C interface.
Power Supply for Digital Inputs and Outputs.
Digital Power Supply.
Analog Power Supply.
Optional External Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
External Loop Filter for the Internal PLL.
Multifunctional Input. Real time control (RTC) input, timing reset input, subcarrier reset input.
This input pin must be tied high (V
DD_IO
) for the ADV7310/ADV7311 to interface over the I
2
C port.
Digital Input/Output Ground.
COMP1,2
DAC A
DAC B
DAC C
DAC D
O
O
O
O
O
DAC E
O
DAC F
O
P_HSYNC
P_VSYNC
P_BLANK
S_BLANK
S_HSYNC
S_VSYNC
Y9–Y0
I
I
I
I/O
I/O
I/O
I
C9–C0
I
S9–S0
I
RESET
I
R
SET1,2
I
SCLK
SDA
ALSB
I
I/O
I
V
DD_IO
V
DD
V
AA
V
REF
EXT_LF
RTC_SCR_TR I
I
2
C
GND_IO
P
P
P
I/O
I
I
相關PDF資料
PDF描述
ADV7311 Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7311KST Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7312 Multiformat 11-Bit HDTV Video Encoder
ADV7312KST Multiformat 11-Bit HDTV Video Encoder
ADV7320KSTZ Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
相關代理商/技術參數
參數描述
ADV7310KSTZ 制造商:Analog Devices 功能描述:VID ENCODER 6DAC 12-BIT 64LQFP - Bulk
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