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參數(shù)資料
型號: ADV7310KST
廠商: ANALOG DEVICES INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
中文描述: COLOR SIGNAL ENCODER, PQFP64
封裝: PLASTIC, MS-026BCD, LQFP-64
文件頁數(shù): 52/84頁
文件大小: 1099K
代理商: ADV7310KST
REV. A
–52–
ADV7310/ADV7311
SD Digital Noise Reduction
[Subaddress 63h, 64h, 65h]
DNR is applied to the Y data only. A filter block selects the high
frequency, low amplitude components of the incoming signal
[DNR input select]. The absolute value of the filter output is
compared to a programmable threshold value ['DNR threshold
control]. There are two DNR modes available: DNR mode and
DNR sharpness mode.
In DNR mode, if the absolute value of the filter output is smaller
than the threshold, it is assumed to be noise. A programmable
amount [coring gain border, coring gain data] of this noise
signal will be subtracted from the original signal. In DNR sharp-
ness mode, if the absolute value of the filter output is less than
the programmed threshold, it is assumed to be noise, as before.
Otherwise, if the level exceeds the threshold, now being identi-
fied as a valid signal, a fraction of the signal [coring gain border,
coring gain data] will be added to the original signal in order to
boost high frequency components and sharpen the video image.
In MPEG systems, it is common to process the video information
in blocks of 8 pixels
×
8 pixels for MPEG2 systems, or 16 pixels
×
16 pixels for MPEG1 systems [block size control]. DNR can be
applied to the resulting block transition areas that are known to
contain noise. Generally, the block transition area contains two
pixels. It is possible to define this area to contain four pixels [bor-
der area].
It is also possible to compensate for variable block positioning
or differences in YCrCb pixel timing with the use of the [DNR
block offset].
The digital noise reduction registers are three 8-bit registers.
They are used to control the DNR processing.
BLOCK SIZE CONTROL
BORDER AREA
BLOCK OFFSET
CORING GAIN DATA
CORING GAIN BORDER
GAIN
DNR CONTROL
FILTER
OUTPUT
> THRESHOLD
INPUT FILTER
BLOCK
FILTER OUTPUT
< THRESHOLD
DNR OUT
+
+
MAIN SIGNAL PATH
ADD SIGNAL
ABOVE THRESHOLD
RANGE FROM
ORIGINAL SIGNAL
DNR
SHARPNESS
MODE
NOISE
SIGNAL PATH
Y DATA
INPUT
BLOCK SIZE CONTROL
BORDER AREA
BLOCK OFFSET
CORING GAIN DATA
CORING GAIN BORDER
GAIN
DNR CONTROL
FILTER
OUTPUT
< THRESHOLD
INPUT FILTER
BLOCK
FILTER OUTPUT
> THRESHOLD
DNR OUT
MAIN SIGNAL PATH
SUBTRACT SIGNAL
IN THRESHOLD
RANGE FROM
ORIGINAL SIGNAL
DNR MODE
NOISE
SIGNAL PATH
Y DATA
INPUT
+
Figure 48. DNR Block Diagram
相關(guān)PDF資料
PDF描述
ADV7311 Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7311KST Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7312 Multiformat 11-Bit HDTV Video Encoder
ADV7312KST Multiformat 11-Bit HDTV Video Encoder
ADV7320KSTZ Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7310KSTZ 制造商:Analog Devices 功能描述:VID ENCODER 6DAC 12-BIT 64LQFP - Bulk
ADV7311 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7311KST 功能描述:IC VID ENC 6-12BIT DAC'S 64LQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編碼器,解碼器,轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源,模擬:- 電壓 - 電源,數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7311KST 制造商:Analog Devices 功能描述:Video IC
ADV7312 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat 11-Bit HDTV Video Encoder
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