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參數資料
| 型號： | ADV7341BSTZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| 中文描述： | SERIAL INPUT LOADING, 12-BIT DAC, PQFP64 |
| 封裝： | ROHS COMPLIANT, MS-026BCD, LQFP-64 |
| 文件頁數： | 27/88頁 |
| 文件大?。?/td> | 1066K |
| 代理商： | ADV7341BSTZ |
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ADV7340/ADV7341
Figure 49 shows an example of data transfer for a write sequence and the start and stop conditions. Figure 50 shows bus write and read sequences.
Rev. 0 | Page 27 of 88
SDA
SCL
START ADDR R/W ACK
SUBADDRESS ACK
Figure 49. I
2
C Data Transfer
DATA
ACK
STOP
1–7
8
9
S
1–7
1–7
P
8
9
8
9
0
WRITE
SEQUENCE
SEQREAD
S
SLAVE ADDR
A(S)
SUBADDR
A(S)
DATA
DATA
A(S)
P
S
SLAVE ADDR
A(S)
SUBADDR
A(S) S
SLAVE ADDR
A(S)
DATA
DATA
A(M)
A(M) P
S = START BIT
P = STOP BIT
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
A(S) = NO-ACKNOWLEDGE BY SLAVE
A(M) = NO-ACKNOWLEDGE BY MASTER
LSB = 0
LSB = 1
A(S)
0
Figure 50. I
2
C Read and Write Sequence
SPI OPERATION
The ADV7340/ADV7341 support a 4-wire serial (SPI-
compatible) bus connecting multiple peripherals. Two inputs,
master out slave in (MOSI) and serial clock (SCLK), and one
output, master in slave out (MISO), carry information between
a master SPI peripheral on the bus and the ADV7340/ADV7341.
Each slave device on the bus has a slave select pin that is
connected to the master SPI peripheral by a unique slave select
line. As such, slave device addressing is not required.
To invoke SPI operation, a master SPI peripheral (for example,
a microprocessor) should issue three low pulses on the ADV7340/
ADV7341 ALSB/SPI_SS pin. When the encoder detects the
third rising edge on the ALSB/SPI_SS pin, it automatically
switches to SPI communication mode. The ADV7340/ADV7341
remain in SPI communication mode until a reset or power-
down occurs.
To control the ADV7340/ADV7341, use the following protocol
for both read and write transactions. First, the master initiates a
data transfer by driving and holding the ADV7340/ADV7341
ALSB/SPI_SS pin low. On the first SCLK rising edge after
ALSB/SPI_SS has been driven low, the write command, defined
as 0xD4, is written to the ADV7340/ADV7341 over the MOSI
line. The second byte written to the MOSI line is interpreted as
the starting subaddress. Data on the MOSI line is written MSB
first and clocked on the rising edge of SCLK.
There is a subaddress auto-increment facility. This allows data
to be written to or read from registers in ascending subaddress
sequence starting at any valid subaddress. The user can also
access any unique subaddress register on a one-by-one basis.
In a write data transfer, 8-bit data bytes are written to the
ADV7340/ADV7341, MSB first, on the MOSI line immediately
after the starting subaddress. The data bytes are clocked into
the ADV7340/ADV7341 on the rising edge of SCLK. When all
data bytes have been written, the master completes the transfer
by driving and holding the ADV7340/ADV7341 ALSB/SPI_SS
pin high.
In a read data transfer, after the subaddress has been clocked
in on the MOSI line, the ALSB/SPI_SS pin is driven and held
high for at least one clock cycle. Then, the ALSB/SPI_SS pin is
driven and held low again. On the first SCLK rising edge after
ALSB/SPI_SS has been driven low, the read command, defined
as 0xD5, is written, MSB first, to the ADV7340/ADV7341 over
the MOSI line. Subsequently, 8-bit data bytes are read from the
ADV7340/ADV7341, MSB first, on the MISO line. The data
bytes are clocked out of the ADV7340/ADV7341 on the falling
edge of SCLK. When all data bytes have been read, the master
completes the transfer by driving and holding the ADV7340/
ADV7341 ALSB/SPI_SS pin high.
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| ADV7341EBZ | Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| ADV7343BSTZ | Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| ADV7342 | Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| ADV7342BSTZ | Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| ADV7343 | Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADV7341EBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| ADV7342 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| ADV7342BSTZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| ADV7343 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| ADV7343BSTZ | 功能描述:IC ENCODER VIDEO W/DAC 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統 電壓 - 電源，模擬:- 電壓 - 電源，數字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
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