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參數資料
| 型號： | ATT3042-70H68I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | FPGA |
| 英文描述： | Field-Programmable Gate Arrays |
| 中文描述： | 現場可編程門陣列 |
| 文件頁數： | 51/80頁 |
| 文件大小： | 528K |
| 代理商： | ATT3042-70H68I |
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Data Sheet
February 1997
ATT3000 Series Field-Programmable Gate Arrays
Lucent Technologies Inc.
51
Package Thermal Characteristics
(continued)
Table 17. ATT3000
Plastic Package Thermal Characteristics
Package
Q
JA
(°C/W)
200 fpm
43
38
35
67
49
18
39
36
20
33
Q
JC
(°C/W)
Max Power
(70 °C—0 fpm)
0 fpm
49
43
40
81
61
22
52
40
23
37
400 fpm
40
35
32
64
46
16
36
32
17
29
44-Pin PLCC
68-Pin PLCC
84-Pin PLCC
100-Pin QFP
100-Pin TQFP
132-Pin PPGA
144-Pin TQFP
160-Pin QFP
175-Pin PPGA
208-Pin SQFP
—
11
9
11
6
—
4
8
—
8
1.12 W
1.28 W
1.38 W
0.68 W
0.90 W
2.50 W
1.06 W
1.38 W
2.39 W
1.49 W
Package Coplanarity
The coplanarity of Lucent Technologies postmolded
packages is 4 mils. The coplanarity of the SQFP and
TQFP packages is 3.15 mils.
Package Parasitics
The electrical performance of an IC package, such as
signal quality and noise sensitivity, is directly affected
by the package parasitics. Table 18 lists eight parasitics
associated with the ATT3000 packages. These parasit-
ics represent the contributions of all components of a
package, which include the bond wires, all internal
package routing, and the external leads.
Four inductances in nH are listed: L
W
and L
L,
the self-
inductance of the lead; and L
MW
and L
ML
, the mutual
inductance to the nearest neighbor lead. These
parameters are important in determining ground
bounce noise and inductive crosstalk noise. Three
capacitances in pF are listed: C
M
, the mutual capaci-
tance of the lead to the nearest neighbor lead; and C
1
and C
2
, the total capacitance of the lead to all other
leads (all other leads are assumed to be grounded).
These parameters are important in determining capaci-
tive crosstalk and the capacitive loading effect of the
lead.
The parasitic values in Table 18 are for the circuit
model of bond wire and package lead parasitics. If the
mutual capacitance value is not used in the designer’s
model, then the value listed as mutual capacitance
should be added to each of the C1 and C2 capacitors.
The PGAs contain power and ground planes that will
make the inductance value for power and ground leads
the minimum value listed. The PGAs also have a signif-
icant range of parasitic values. This is due to the large
variation in internal trace lengths and is also due to two
signal metal layers that are separated from the ground
plane by different distances. The upper signal layer is
more inductive but less capacitive than the closer,
lower signal layer.
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| ATT3042-70J132I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
| ATT3042-70J44I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
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