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參數資料
| 型號： | CDC9449 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | PC Motherboard Clock Sythesizer/Drivers with SDRAM Clock Support(PC時鐘合成器/驅動器(SDRAM 時鐘支持)) |
| 中文描述： | 電腦主板時鐘Sythesizer /支持與SDRAM時鐘驅動器（電腦時鐘合成器/驅動器（SDRAM的時鐘支持）） |
| 文件頁數： | 1/6頁 |
| 文件大小： | 115K |
| 代理商： | CDC9449 |
CDC9449
PC CLOCK SYNTHESIZER/DRIVER
WITH SDRAM CLOCK SUPPORT
SCAS577 – AUGUST 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Utility Clock Generation for Personal
Computer Applications
Two 48-MHz Serial Bus Clock Outputs
One 24-MHz Super I/O Controller Clock
Output
One AUDIO Clock Output With Selectable
Frequency
One Clock Output at 1/2 AUDIO Clock
Frequency
All Output Clock Frequencies Derived From
a Single 14.31818-MHz Crystal Input
Internal Loop Filters for Phase-Lock Loops
(PLL)
Packaged in Shrink Small-Outline Package
description
The CDC9449 is a system clock synthesizer for use in personal computer systems. An integrated crystal
oscillator generates a 14.318-MHz reference frequency, while two integrated PLLs generate a 48-MHz clock,
a 24-MHz clock, and a selectable AUDIO and 1/2 AUDIO clock frequency from a 14.31818-MHz crystal input.
The CDC9449 provides two copies of the 48-MHz serial bus clock, one copy of the 24-MHz super I/O controller
clock, one copy of the AUDIO clock, one copy of the 1/2 AUDIO clock, and three copies of the 14.318-MHz
reference frequency.
All outputs are 3-state and can be disabled by the output-enable (OE) control input. When OE = L, all outputs
are placed in a high-impedance state.
The CDC9449 is characterized for operation from 0
°
C to 70
°
C.
FUNCTION TABLE
OE
SEL1
SEL0
XIN
SBCLKn
FCCLK
REFn
AUDIO
1/2 AUDIO
L
X
X
14.318 MHz
Hi Z
Hi Z
Hi Z
Hi Z
Hi Z
H
L
L
TCLK
TCLK/2
TCLK/4
TCLK
TCLK/2
TCLK/4
H
L
H
14.318 MHz
48 MHz
24 MHz
14.318 MHz
24.576 MHz
12.288 MHz
H
H
L
14.318 MHz
48 MHz
24 MHz
14.318 MHz
33.8688 MHz
16.934 MHz
H
H
H
14.318 MHz
48 MHz
24 MHz
14.318 MHz
L
L
The allowable reference frequency is minimum = 14.316 MHz, nominal = 14.31818 MHz, and maximum = 14.32 MHz.
TCLK is a test clock driven over XIN in the test mode.
Copyright
1996, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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V
CC
XIN
XOUT
GND
OE
AUDIO
1/2AUDIO
V
CC
SEL0
SEL1
REF2
REF1
V
CC
REF0
GND
SBCLK1
SBCLK0
V
CC
FCCLK
GND
DB PACKAGE
(TOP VIEW)
P
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| CDC9841 | PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER WITH 3-STATE OUTPUTS |
| CDC9841DW | PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER WITH 3-STATE OUTPUTS |
| CDC9841DWR | PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER WITH 3-STATE OUTPUTS |
| CDC9842 | PC Motherboard Clock Sythesizer/Drivers with 3 - State Outputs(PC母板時鐘合成器/驅動器(三態輸出)) |
| CDC9843 | PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER WITH 3-STATE OUTPUTS |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CDC950 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:133-MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS/SERVERS |
| CDC950DGG | 功能描述:時鐘合成器/抖動清除器 133MHz Clk Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDC950DGGG4 | 功能描述:時鐘合成器/抖動清除器 133MHz Clk Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDC950DGGR | 功能描述:時鐘合成器/抖動清除器 Fully Int Lo-Jitter Crstal Osc Clock Gen RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDC950DGGRG4 | 功能描述:時鐘合成器/抖動清除器 Fully Int Lo-Jitter Crstal Osc Clock Gen RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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