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參數資料
型號: CY62167DV30
廠商: Cypress Semiconductor Corp.
英文描述: 16-Mbit (1M x 16) Static RAM(16-Mb(1M x 16)靜態RAM)
中文描述: 16兆位(1米× 16),靜態存儲器(16字節(1米× 16),靜態內存)
文件頁數: 1/12頁
文件大小: 322K
代理商: CY62167DV30
16-Mbit (1M x 16) Static RAM
CY62167DV30 MoBL
Cypress Semiconductor Corporation
Document #: 38-05328 Rev. *G
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised July 27, 2006
Features
TSOP I Configurable as 1M x 16 or as 2M x 8 SRAM
Very high speed: 45 ns
Wide voltage range: 2.2V – 3.6V
Ultra-low active power
— Typical active current: 2 mA @ f = 1 MHz
— Typical active current: 18.5 mA @ f = f
Max
(45 ns
speed)
Ultra-low standby power
Easy memory expansion with CE
1
, CE
2
and OE features
Automatic power-down when deselected
CMOS for optimum speed/power
Available in Pb-free and non Pb-free 48-ball VFBGA
and 48-pin TSOP I package
Functional Description
[1]
The CY62167DV30 is a high-performance CMOS static RAM
organized as 1M words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life
(MoBL
) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that significantly
reduces power consumption by 99% when addresses are not
toggling. The device can also be put into standby mode when
deselected (CE
1
HIGH or CE
2
LOW or both BHE and BLE are
HIGH). The input/output pins (I/O
0
through I/O
15
) are placed
in a high-impedance state when: deselected (CE
1
HIGH or CE
2
LOW), outputs are disabled (OE HIGH), both Byte High
Enable and Byte Low Enable are disabled (BHE, BLE HIGH),
or during a Write operation (CE
1
LOW, CE
2
HIGH and WE
LOW).
Writing to the device is accomplished by taking Chip Enables
(CE
1
LOW and CE
2
HIGH) and Write Enable (WE) input LOW.
If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is written into the location specified on the
address pins (A
0
through A
19
). If Byte High Enable (BHE) is
LOW, then data from I/O pins (I/O
8
through I/O
15
) is written into
the location specified on the address pins (A
0
through A
19
).
Reading from the device is accomplished by taking Chip
Enables (CE
1
LOW and CE
2
HIGH) and Output Enable (OE)
LOW while forcing the Write Enable (WE) HIGH. If Byte Low
Enable (BLE) is LOW, then data from the memory location
specified by the address pins will appear on I/O
0
to I/O
7
. If Byte
High Enable (BHE) is LOW, then data from memory will appear
on I/O
8
to I/O
15
. See the truth table at the back of this data
sheet for a complete description of Read and Write modes.
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Logic Block Diagram
1M × 16 / 2M x 8
RAM Array
I/O
0
–I/O
7
R
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
COLUMN DECODER
A
1
A
1
A
1
A
1
A
1
S
DATA IN DRIVERS
OE
I/O
8
–I/O
15
WE
BLE
BHE
A
1
A
0
A
1
A
9
A
1
A
10
Power-Down
Circuit
BHE
BLE
CE
2
CE
1
CE
2
CE
1
A
1
BYTE
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相關代理商/技術參數
參數描述
CY62167DV30L-70BVI 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3V 16M-Bit 1M x 16 70ns 48-Pin VFBGA
CY62167DV30LL-45ZI 制造商:Cypress Semiconductor 功能描述:
CY62167DV30LL-45ZXI 功能描述:IC SRAM 16MBIT 45NS 48TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:MoBL® 標準包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M(8Mx32) 速度:133MHz 接口:并聯 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應商設備封裝:90-VFBGA(8x13) 包裝:帶卷 (TR) 其它名稱:557-1327-2
CY62167DV30LL-45ZXIT 功能描述:IC SRAM 16MBIT 45NS 48TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:MoBL® 標準包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M(8Mx32) 速度:133MHz 接口:并聯 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應商設備封裝:90-VFBGA(8x13) 包裝:帶卷 (TR) 其它名稱:557-1327-2
CY62167DV30LL-55BVI 功能描述:靜態隨機存取存儲器 SLO 1.8V SUPER LO PWR 1MEGX16 靜態隨機存取存儲器 IND RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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