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參數資料
| 型號： | CY74FCT163374SSOP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 16-Bit Registers |
| 中文描述： | 16位寄存器 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 127K |
| 代理商： | CY74FCT163374SSOP |
16-Bit Registers
CY74FCT163374
CY74FCT163H374
SCCS050 - March 1997 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright
2000, Texas Instruments Incorporated
Features
Low power, pin-compatible replacement for LCX and
LPT families
5V tolerant inputs and outputs
24 mA balanced drive outputs
Power-off disable outputs permits live insertion
Edge-rate control circuitry for reduced noise
FCT-C speed at 5.2 ns
Latch-up performance exceeds JEDEC standard no. 17
Typical output skew < 250 ps
Industrial temperature range of –40C to +85C
TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)
TypicalV
olp
(groundbounce)performanceexceedsMil
Std 883D
V
CC
= 2.7V to 3.6V
ESD (HBM) > 2000V
CY74FCT163H374
Bus hold on data inputs
Eliminates the need for external pull-up or pull-down
resistors
Devices with bus hold are not recommended for trans-
lating rail-to-rail CMOS signals to 3.3V logic levels
Functional Description
These devices are 16-bit D-type registers designed for use as
buffered registers in high-speed, low power bus applications.
These devices can be used as two independent 8-bit registers
or as a single 16-bit register by connecting the output Enable
(OE)andClock(CLK)inputs.Theoutputsare24-mAbalanced
output drivers with current limiting resistors to reduce the need
for external terminating resistors, and provide for minimal
undershoot and reduced ground bounce. Flow-through pinout
and small shrink packaging aid in simplifying board layout.
The CY74FCT163H374 has “bus hold” on the data inputs,
which retains the input’s last state whenever the source driving
the input goes to high impedance. This eliminates the need for
pull-up/down resistors and prevents floating inputs.
The CY74FCT163374 is designed with inputs and outputs
capable of being driven by 5.0V buses, allowing its use in
mixed voltage systems as a translator. The outputs are also
designed with a power off disable feature enabling its use in
applications requiring live insertion.
Lite Drive is a trademark of Cypress Semiconductor Corporation.
Logic Block Diagrams CY74FCT163374, CY74FCT163H374
Pin Configuration
SSOP/TSSOP
Top View
D
C
1
OE
1
CLK
1
D
1
1
O
1
TO 7 OTHER CHANNELS
D
C
2
OE
2
CLK
2
D
1
2
O
1
GND
1
D
3
1
D
4
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
33
32
31
30
29
28
25
26
27
36
35
34
1
OE
1
O
1
1
O
2
GND
45
44
43
42
41
40
37
38
39
48
47
46
1
O
3
1
O
4
V
CC
1
O
5
1
O
6
GND
1
D
1
1
D
2
1
CLK
GND
1
D
7
1
D
8
2
D
1
2
D
2
1
O
7
1
O
8
2
O
1
2
O
2
GND
1
D
5
1
D
6
GND
2
D
3
2
D
4
V
CC
2
O
3
2
O
4
V
CC
2
O
5
2
O
6
GND
GND
2
D
7
2
D
8
2
CLK
2
O
7
2
O
8
2
OE
2
D
5
2
D
6
TO 7 OTHER CHANNELS
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