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參數(shù)資料
| 型號(hào)： | CY7C1021V |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 64K x 16 Static RAM(64K x 16 靜態(tài) RAM) |
| 中文描述： | 64K的× 16靜態(tài)RAM（64K的× 16靜態(tài)RAM）的 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大小： | 217K |
| 代理商： | CY7C1021V |
64K x 16 Static RAM
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
1
through I/O
8
), is
written into the location specified on the address pins (A
0
through A
15
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
9
through I/O
16
) is written into the location
specified on the address pins (A
0
through A
15
).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O
1
to I/O
8
. If Byte High Enable (BHE) is LOW,
then data from memory will appear on I/O
9
to I/O
16
.
See the
truth table at the back of this data sheet for a complete descrip-
tion of read and write modes.
The input/output pins (I/O
1
through I/O
16
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1021V is available in 400-mil-wide SOJ, standard
44-pin TSOP Type II, and in 48-ball mini BGA packages.
CY7C1021V
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
October 18, 1999
Features
3.3V operation (3.0V–3.6V)
High speed
—
t
AA
= 10/12/15 ns
CMOS for optimum speed/power
Low Active Power (L version)
—
576 mW (max.)
Low CMOS Standby Power (L version)
—
1.80 mW (max.)
Automatic power-down when deselected
Independent control of upper and lower bits
Available in 44-pin TSOP II and 400-mil SOJ
Available in a 48-Ball Mini BGA package
Functional Description
The CY7C1021V is a high-performance CMOS static RAM or-
ganized as 65,536 words by 16 bits. This device has an auto-
matic power-down feature that significantly reduces power
consumption when deselected.
WE
A15
A14
A13
A12
NC
Logic Block Diagram
Pin Configuration
SOJ / TSOP II
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
31
30
32
36
35
34
33
37
40
39
38
Top View
41
44
43
42
16
17
29
28
CC
V
I/O5
I/O6
A
4
A3
A2
A1
A0
OE
BHE
BLE
V
SS
V
I/O12
I/O11
I/O10
I/O9
A5
A6
A7
I/O16
I/O15
I/O14
CE
I/O1
I/O2
I/O3
V
NC
A8
A9
A10
A11
1021V-2
18
19
20
21
27
26
25
24
22
23
NC
I/O7
64K x 16
RAM Array
512 X 2048
I/O
1
– I/O
8
R
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
COLUMN DECODER
A
9
A
1
A
1
A
1
A
1
A
1
A
1
S
DATA IN DRIVERS
OE
BLE
I/O
9
– I/O
16
CE
BHE
A
8
1021V-1
Selection Guide
7C1021V-10
10
210
160
5
0.500
7C1021V-12
12
200
150
5
0.500
7C1021V-15
15
190
140
5
0.500
Maximum Access Time (ns)
Maximum Operating Current (mA)
Commercial
L
Maximum CMOS Standby Current (mA)
Commercial
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1021V33-10VC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1021V33-10ZC | 制造商:Cypress Semiconductor 功能描述:Static RAM, 64Kx16, 44 Pin, Plastic, TSOP |
| CY7C1021V33-12VC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C1021V33-12VCT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C1021V33-12VIT | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
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