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參數(shù)資料
| 型號： | DC1370A-L |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 1/34頁 |
| 文件大小： | 0K |
| 描述： | BOARD DEMO 25MSPS LTC2256-12 |
| 軟件下載： | QuikEval II System |
| 設(shè)計資源： | DC1370A Design Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
| 相關(guān)產(chǎn)品： | DC718C-ND - DEMO QUIKEVAL-II DATA |
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LTC2258-12
LTC2257-12/LTC2256-12
1
225812fd
For more information www.linear.com/LTC2258-12
Typical applicaTion
FeaTures
applicaTions
DescripTion
12-Bit, 65/40/25Msps
Ultralow Power 1.8V ADCs
n
Communications
n
Cellular Base Stations
n
Software Defined Radios
n
Portable Medical Imaging
n
Multi-Channel Data Acquisition
n
Nondestructive Testing
L
, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
71.1dB SNR
n
88dB SFDR
n
Low Power: 79mW/47mW/34mW
n
Single 1.8V Supply
n
CMOS, DDR CMOS or DDR LVDS Outputs
n
Selectable Input Ranges: 1VP-P to 2VP-P
n
800MHz Full-Power Bandwidth S/H
n
Optional Data Output Randomizer
n
Optional Clock Duty Cycle Stabilizer
n
Shutdown and Nap Modes
n
Serial SPI Port for Configuration
n
Pin Compatible 14-Bit and 12-Bit Versions
n
40-Pin (6mm × 6mm) QFN Package
The LTC2258-12/LTC2257-12/LTC2256-12 are sam-
pling 12-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. They are perfect
for demanding communications applications with AC
performancethatincludes71.1dBSNRand88dBspurious
free dynamic range (SFDR). Ultralow jitter of 0.17psRMS
allows undersampling of IF frequencies with excellent
noise performance.
DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL
(typical) and no missing codes over temperature. The
transition noise is a low 0.3LSBRMS.
The digital outputs can be either full rate CMOS, double
data rate CMOS, or double data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC+ and ENC– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
LTC2258-12 2-Tone FFT,
fIN = 68MHz and 69MHz
–
+
INPUT
S/H
CORRECTION
LOGIC
OUTPUT
DRIVERS
12-BIT
PIPELINED
ADC CORE
CLOCK/DUTY
CYCLE
CONTROL
D11
D0
65MHz
CLOCK
ANALOG
INPUT
225812 TA01a
CMOS
OR
LVDS
1.2V
TO 1.8V
1.8V
VDD
OVDD
OGND
GND
FREQUENCY (MHz)
0
–100
–110
–120
–70
–60
–80
–90
AMPLITUDE
(dBFS) –50
–30
–40
–20
–10
0
10
20
30
225812 TA01b
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