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參數資料
| 型號： | DJIXE972MHEA4 |
| 廠商： | Intel Corp. |
| 英文描述： | Single-Port 10/100 Mbps PHY Transceiver |
| 中文描述： | 單端口10/100 Mbps的物理層收發器 |
| 文件頁數： | 49/92頁 |
| 文件大小： | 666K |
| 代理商： | DJIXE972MHEA4 |
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Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
49
5.7.3.3
Twisted-Pair Physical Medium Dependent Sublayer
The twisted-pair Physical Medium Dependent (PMD) layer provides signal scrambling and de-
scrambling functions, line coding and decoding functions (MLT-3 for 100BASE-TX, Manchester
for 10BASE-T), as well as receiving, polarity correction, and baseline wander correction functions.
5.7.3.3.1
Scrambler/Descrambler
The purpose of the scrambler/descrambler is to spread the signal power spectrum and further
reduce EMI using an 11-bit, data-independent polynomial. The receiver automatically decodes the
polynomial whenever IDLE symbols are received.
Scrambler Seeding.
Once the transmit data (or Idle symbols) are properly encoded, they are
scrambled to further reduce EMI and to spread the power spectrum using an 11-bit scrambler seed.
Five seed bits are determined by the PHY address, and the remaining bits are hard coded in the
design.
Scrambler Bypass.
The scrambler/de-scrambler can be bypassed by setting Register bit 16.12 = 1.
Scrambler bypass is provided for diagnostic and test support.
5.7.3.3.2
Polarity Correction
The 100 Mbps twisted pair signaling is not polarity sensitive. As a result, the polarity status is not a
valid status indicator.
5.7.3.3.3
Baseline Wander Correction
The LXT972M Transceiver provides a baseline wander correction function for when the
LXT972M Transceiver is under network operating conditions. The MLT3 coding scheme used in
100BASE-TX is by definition “unbalanced”. As a result, the average value of the signal voltage
can “wander” significantly over short time intervals (tenths of seconds). This wander can cause
receiver errors at long-line lengths (100 meters) in less robust designs. Exact characteristics of the
wander are completely data dependent.
The LXT972M Transceiver baseline wander correction characteristics allow the device to recover
error-free data while receiving worst-case packets over all cable lengths.
5.7.3.3.4
Programmable Slew Rate Control
The LXT972M Transceiver device supports a programmable slew-rate mechanism whereby one of
four pre-selected slew rates can be used. (For details, see
Table 56, “Transmit Control Register -
Address 30, Hex 1E” on page 89
.) The slew-rate mechanism allows the designer to optimize the
output waveform to match the characteristics of the magnetics.
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PDF描述 |
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| DJIXE972MKAA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJIXE972MKCA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJIXE972MKEA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJIXE972MLAA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJIXE972MLCA4 | Single-Port 10/100 Mbps PHY Transceiver |
相關代理商/技術參數 |
參數描述 |
|---|---|
| DJIXE972MKAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJIXE972MKCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJIXE972MKEA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJIXE972MLAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJIXE972MLCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
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