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參數資料
| 型號： | DSPIC33FJ16MC304T-I/PT |
| 廠商： | Microchip Technology |
| 文件頁數： | 42/76頁 |
| 文件大小： | 0K |
| 描述： | IC DSPIC MCU/DSP 16K 44TQFP |
| 產品培訓模塊： | Asynchronous Stimulus |
| 標準包裝： | 1,200 |
| 系列： | dsPIC™ 33F |
| 核心處理器： | dsPIC |
| 芯體尺寸： | 16-位 |
| 速度： | 40 MIP |
| 連通性： | I²C，IrDA，LIN，SPI，UART/USART |
| 外圍設備： | 欠壓檢測/復位，DMA，電機控制 PWM，QEI，POR，PWM，WDT |
| 輸入/輸出數： | 35 |
| 程序存儲器容量： | 16KB（16K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 2K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 數據轉換器： | A/D 9x10b/12b |
| 振蕩器型： | 內部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-TQFP |
| 包裝： | 帶卷 (TR) |
| 配用： | DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32 |
| 其它名稱： | DSPIC33FJ16MC304T-I/PTTR |
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2007-2012 Microchip Technology Inc.
DS70283K-page 47
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
TABLE 4-26:
FUNDAMENTAL ADDRESSING MODES SUPPORTED
4.5.3
MOVE AND ACCUMULATOR
INSTRUCTIONS
Move instructions and the DSP accumulator class of
instructions provide a greater degree of addressing
flexibility than other instructions. In addition to the
addressing
modes
supported
by
most
MCU
instructions, move and accumulator instructions also
support Register Indirect with Register Offset
Addressing mode, also referred to as Register Indexed
mode.
In summary, the following addressing modes are
supported by move and accumulator instructions:
Register Direct
Register Indirect
Register Indirect Post-modified
Register Indirect Pre-modified
Register Indirect with Register Offset (Indexed)
Register Indirect with Literal Offset
8-bit Literal
16-bit Literal
4.5.4
MAC INSTRUCTIONS
The dual source operand DSP instructions (CLR, ED,
EDAC, MAC, MPY, MPY.N, MOVSAC and MSC), also referred
to as MAC instructions, use a simplified set of addressing
modes to allow the user application to effectively
manipulate the data pointers through register indirect
tables.
The two-source operand prefetch registers must be
members of the set {W8, W9, W10, W11}. For data
reads, W8 and W9 are always directed to the X RAGU,
and W10 and W11 are always directed to the Y AGU.
The effective addresses generated (before and after
modification) must, therefore, be valid addresses within
X data space for W8 and W9 and Y data space for W10
and W11.
In summary, the following addressing modes are
supported by the MAC class of instructions:
Register Indirect
Register Indirect Post-Modified by 2
Register Indirect Post-Modified by 4
Register Indirect Post-Modified by 6
Register Indirect with Register Offset (Indexed)
4.5.5
OTHER INSTRUCTIONS
Besides the addressing modes outlined previously, some
instructions use literal constants of various sizes. For
example, BRA (branch) instructions use 16-bit signed
literals to specify the branch destination directly, whereas
the DISI instruction uses a 14-bit unsigned literal field. In
some instructions, such as ADD Acc, the source of an
operand or result is implied by the opcode itself. Certain
operations, such as NOP, do not have any operands.
Addressing Mode
Description
File Register Direct
The address of the file register is specified explicitly.
Register Direct
The contents of a register are accessed directly.
Register Indirect
The contents of Wn forms the Effective Address (EA).
Register Indirect Post-Modified
The contents of Wn forms the EA. Wn is post-modified (incremented
or decremented) by a constant value.
Register Indirect Pre-Modified
Wn is pre-modified (incremented or decremented) by a signed constant value
to form the EA.
Register Indirect with Register Offset
(Register Indexed)
The sum of Wn and Wb forms the EA.
Register Indirect with Literal Offset
The sum of Wn and a literal forms the EA.
Note:
For the MOV instructions, the addressing
mode specified in the instruction can differ
for the source and destination EA.
However, the 4-bit Wb (Register Offset)
field is shared by both source and
destination (but typically only used by
one).
Note:
Not all instructions support all the
addressing modes given above. Individual
instructions may support different subsets
of these addressing modes.
Note:
Register Indirect with Register Offset
Addressing mode is available only for W9
(in X space) and W11 (in Y space).
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相關代理商/技術參數 |
參數描述 |
|---|---|
| dsPIC33FJ256GP506A-E/MR | 功能描述:數字信號處理器和控制器 - DSP, DSC 16 Bit MCU/DSP 64LD 40MIPS 256KB FLASH RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| dsPIC33FJ256GP506A-E/PT | 功能描述:數字信號處理器和控制器 - DSP, DSC 16Bit 40MIPS 256KB Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| DSPIC33FJ256GP506A-H/MR | 制造商:Microchip Technology Inc 功能描述:16 BIT MCU/DSP 64LD 40MIPS 256KB FLASH - Trays |
| DSPIC33FJ256GP506A-H/PT | 制造商:Microchip Technology Inc 功能描述:16 BIT MCU/DSP 64LD 40MIPS 256KB FLASH - Trays |
| dsPIC33FJ256GP506A-I/MR | 功能描述:數字信號處理器和控制器 - DSP, DSC 16 Bit MCU/DSP 64LD 40MIPS 256KB FLASH RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
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