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參數資料
| 型號： | FAN5038M |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩壓器 |
| 英文描述： | Current-Mode SMPS Controller |
| 中文描述： | SWITCHING CONTROLLER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數： | 10/15頁 |
| 文件大小： | 84K |
| 代理商： | FAN5038M |
FAN5038
PRODUCT SPECIFICATION
10
REV. 1.0.2 7/6/00
Output Voltage Selection
The FAN5038 precision reference is trimmed to be 1.5V
nominally. When using the FAN5038, the system designer
has complete flexibility in choosing the output voltage for
each regulator from 1.5V to 3.6V. This is done by appropri-
ately selecting the feedback resistors. These could be 0.1%
resistors to realize optimum output accuracy. The following
equations determine the output voltages of the two regulators:
Switching Regulator:
Linear Regulator:
where R8 > 1.5k
and (R8 + R3)
≤
25k
and R10 > 1.5k
and (R9 + R10)
≤
25k
Example:
For 3.3V,
Input Capacitors
The number of input capacitors required for the FAN5038 is
dependent on their ripple current rating, which assures their
rated life. The number required may be determined by
where the duty cycle DC = V
out
/V
in
. For example, with a
1.5V output at 4A, 5V input, and using the Sanyo capacitors
specified in Table 1 which have a 1.9A ripple current rating,
we have DC = 1.5/5 = 0.3, and
so that we need 1 input capacitor.
Linear Regulator Design Considerations
Figure 1 shows the application schematic for the FAN5038
with an NPN used for the linear regulator.
Careful consideration must be given to the base current of
the power NPN device. The base current to the power NPN
device is limited by:
The FAN5038 op-amp output current (50mA)
The internal power dissipation of the FAN5038 package
The
β
of the power NPN device.
The internal FAN5038 power dissipation is the most impor-
tant limitation for this application. For optimum reliability,
we require that the junction temperature not exceed 130°C;
thus we can calculate the maximum power dissipation allow-
able for this 16-lead SOIC package as follows:
If we assume that the ambient temperature T
A
is 70°C and
the thermal resistance of the 16-lead SOIC package is
112°C/W, then the maximum power dissipation for the IC is:
where P
SW
is the internal power dissipation of the switching
regulator and P
LN
is the internal power dissipation of the linear
regulator. I
OL
is the linear regulator op-amp output current.
For V
OUT
= 3.3V nominal, the worst case output will be
determined by the current used.
For example, for a worst case V
OUT
= 3.135V, the maximum
op-amp output current is:
The power NPN transistor must have a minimum
β
of 12.5 at
I
L
= 500mA in order to meet the internal power dissipation
limit of the 16-SOIC package.
V
OUT
1.5
R8
R3
+
R8
×
=
V
OUT
1.5
R10
R9
+
R10
×
=
V
OUT
1.5
R10
R9
+
R10
×
1.5
12k
10k
+
10k
×
3.3V
=
=
=
No. Caps
I
-----------I
DC
rating
DC
2
–
*
=
(2)
No. Caps
0.3
4
0.3
2
–
1.9
0.96
=
=
P
D
T
-------------------------------
T
A
–
R
Θ
JA
=
P
D
130
70
–
112
0.533W
≤
=
P
D
P
SW
P
LR
+
=
=
35mA
5.25V
×
(
)
12.6V
V
OUT
–
V
BE
–
(
)
I
OL
0.533W
≤
×
+
I
OL
35mA
3.135V
5.25V
0.8V
×
–
(
)
–
–
)
0.12.6V
40mA
≤
=
β
40mA
500mA
≥
12.5
=
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