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參數(shù)資料
型號(hào): FAN9611MX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 21/35頁(yè)
文件大小: 1556K
描述: IC PFC CTLR DUAL BCM 16-SOIC
標(biāo)準(zhǔn)包裝: 1
系列: Sync-Lock™
模式: 臨界傳導(dǎo)(BCM)
頻率 - 開(kāi)關(guān): 16.5kHz ~ 525kHz
電流 - 啟動(dòng): 80µA
電源電壓: 9 V ~ 18 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 標(biāo)準(zhǔn)包裝
其它名稱(chēng): FAN9611MXFSDKR
 
?2008 Fairchild Semiconductor Corporation
 
www.fairchildsemi.com
FAN9611 " Rev. 1.1.7
21
Quick Setup Guide
The FAN9611 can be configured following the next
steps outlined in this section. This Quick Setup Guide
refers   to   the   schematic   diagram   and   component
references of Figure 32. It uses the equations derived
and explained in Application Note AN-6086.
In preparation to calculate the setup component values,
the   power   supply   specification   must   be   known.
Furthermore, a few power stage components must be
pre-calculated before the controller design begins as
their values determine the component selections. An
Excel design tool is also available to ease calculations.
Description
Name    Value
From Power Supply Specification:
Minimum AC RMS Input (Turn-On)
V
LINE.ON
     
Minimum AC RMS Input (Turn-Off)
 
V
LINE.OFF
    
Minimum Line Frequency
f
LINE,MIN
     
Nominal DC Output
V
OUT
 
 
Output Voltage Ripple (2 ?/SPAN> f
LINE
)
V
OUT,RIPPLE
   
Latching Output OVP
V
OUT,LATCH
   
Nominal Output Power (to Load)
P
OUT
 
 
Desired Hold-Up Time
t
HOLD
 
 
Minimum DC Output (End of t
HOLD
)
V
OUT,MIN
    
Minimum Switching Frequency
f
SW,MIN
     
Maximum DC Bias
V
DDMAX
     
Pre-Calculated Power Stage Parameters:
Estimated Conversion Efficiency
?
0.95
Maximum Output Power per Channel
P
MAX,CH
 
 
Output Capacitance
C
OUT
 
 
Boost Inductance per Channel
L
 
Maximum On-Time per Channel
t
ON,MAX
 
 
Turns Ratio (N
BOOST
 / N
AUX
)
N
10
Other Variables Used During the Calculations:
Peak Inductor Current
I
L,PK
 
 
Maximum DC Output Current (to Load)
I
O,MAX
 
 
Calculated Component Values:
Zero Current Detect Resistor
R
ZCD1
,
R
ZCD2
 
 
Bypass Capacitor for 5V Bias
C
5VB
 
0.15?
Maximum On-Time Set
R
MOT
 
 
Soft-Start Capacitor
C
SS
 
 
Compensation Capacitor
C
COMP,LF
 
 
Compensation Resistor
R
COMP
 
 
Compensation Capacitor
C
COMP,HF
 
 
Feedback Divider
R
FB1
 
 
Feedback Divider
R
FB2
 
 
Over Voltage Sense Divider
R
OV1
 
 
Over Voltage Sense Divider
R
OV2
 
 
Input Voltage Sense Divider
R
IN1
 
 
Input Voltage Sense Divider
R
IN2
 
 
Brownout Hysteresis Set
R
INHYST
 
 
Gate Drive Resistor
R
G1
, R
G2
 
 
Gate Drive Speed-Up Diode
D
G1
, D
G2
 
Bypass Capacitor for VDD_HF
C
VDD1
 
2.2?
Startup Energy Storage for V
DD
 
C
VDD2
 
47?SPAN class="pst FAN9611MX_2640141_5"> 
Current Sense Resistor
R
CS1
, R
CS2
 
 
 
Step 1
: Input Voltage Range
FAN9611 utilizes a single pin (VIN) for input voltage
sensing. The VIN pin must be above 0.925 V (V
IN_BO
) to
enable operation. The converter turns on at a higher
VIN voltage (V
IN_ON
) set independently by the designer.
The input voltage information is used for feedforward in
the   control   algorithm   as   well.   The   input-voltage
feedforward operates over a four-to-one range from
0.925 V (V
IN_BO
) to 3.7 V (V
FF_UL
), as measured at the
VIN pin.
 
 
Figure 30. VIN Turn-on and Turn-off Thresholds 
At V
IN
  voltages above the 3.7 V upper limit (V
FF_UL
),
input voltage feedforward is not possible. The input
voltage-sense circuitry saturates at this point and the
PWM ramp is modulated any longer. Above V
FF_UL
, the
converters output power becomes a function of the
input voltage as shown in Figure 31. It can also be
expressed analytically as:
2
MAX
OUT_NO_FF
3.7
VIN
P
P
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
"
=
 
(5)
where VIN is the voltage at the VIN pin and P
MAX
 is the
desired maximum output power of the converter which
will be maintained constant while the input voltage
feedforward circuit is operational.
 
 
Figure 31. VIN Feedforward Range 
As can be seen, the converters output power capability
will follow a square function above V
FF_UL
.
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