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參數資料
型號: FDC697P
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: P-Channel 1.8V PowerTrench MOSFET
中文描述: 8 A, 20 V, 0.02 ohm, P-CHANNEL, Si, POWER, MOSFET
封裝: LEAD FREE, FLMP, SUPERSOT-6
文件頁數: 2/6頁
文件大小: 159K
代理商: FDC697P
FDC697P Rev C2 (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
BV
DSS
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSS
Gate–Body Leakage
V
GS
= 0 V,
I
D
= –250
μ
A
–20
V
Breakdown Voltage Temperature
I
D
= – 250
μ
A, Referenced to 25
°
C
–12.2
mV/
°
C
V
DS
= –16 V,
V
GS
=
±
8 V,
V
GS
= 0 V
V
DS
= 0 V
–1
±
100
μ
A
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
T
J
Temperature Coefficient
R
DS(on)
Static Drain–Source
On–Resistance
(Note 2)
V
DS
= V
GS
,
I
D
= – 250
μ
A, Referenced to 25
°
C
V
GS
= –4.5 V,
V
GS
= –2.5 V,
V
GS
= –1.8 V,
V
GS
= –4.5 V, I
D
= –8 A, T
J
=125
°
C
V
DS
= –5 V,
I
D
= –250
μ
A
–0.4
–0.8
–1.5
V
Gate Threshold Voltage
2.9
mV/
°
C
I
D
= –8 A
I
D
= –6.8 A
I
D
= –5.8 A
13
18
26
16
20
25
35
27
m
g
FS
Forward Transconductance
I
D
= –8 A
37
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
3524
544
254
3.8
pF
pF
pF
V
DS
= – 10 V,
f = 1.0 MHz
V
GS
= 0 V,
V
GS
= 15 mV,
f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
18
6
119
43
39
6
5.6
32
12
190
69
55
8.4
7.8
ns
ns
ns
ns
nC
nC
nC
V
DD
= –10 V,
V
GS
= –4.5 V, R
GEN
= 6
I
D
= –1 A,
V
DS
= –10 V,
V
GS
= –4.5 V
I
D
= –8 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
t
rr
Reverse Recovery Time
Q
rr
Reverse Recovery Charge
Notes: 1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting
surface of the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
–1.6
A
V
SD
V
GS
= 0 V,
I
S
= –1.6 A
(Note 2)
–0.7
–1.2
V
27
16
ns
nC
I
F
= –8 A,
d
iF
/d
t
= 100 A/μs
a)
60°C/W when
mounted on a 1in
2
pad
of 2 oz copper
b)
111°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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