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參數(shù)資料
型號: FM8P51EP
廠商: Electronic Theatre Controls, Inc.
英文描述: EPROM/ROM-Based 8-Bit Microcontroller
中文描述: 存儲器/基于ROM的8位微控制器
文件頁數(shù): 17/60頁
文件大小: 369K
代理商: FM8P51EP
FM8P51
Rev1.2 Mar 15, 2005
P.17/FM8P51
FEELING
TECHNOLOGY
= 0,1,1,0,0, IOB5/RFC12 pin is configured to RFC12 pin.
= 0,1,1,0,1, IOB6/RFC13 pin is configured to RFC13 pin.
= 0,1,1,1,0, IOB7/RFC14 pin is configured to RFC14 pin.
= 0,1,1,1,1, IOC2/RFC15 pin is configured to RFC15 pin.
= 1,0,0,0,0, IOC1/RFC16 pin is configured to RFC16 pin.
= 1,0,0,0,1, DATA/RFC17 pin is configured to RFC17 pin.
= 1,0,0,1,0, CLK/RFC18 pin is configured to RFC18 pin.
Bit5
: Not used. Read as “0”.
START
: RFC counter enable bit
= 1, RFC counter start to convert.
= 0, Stop the RFC conversion, reset by hardware when conversion is finished or by software.
RFCON
: RFC module enable bit
= 1, Enable RFC module, the selected IOxx/RFCx pin is configured to RFCx pin, and the IOA1/CX pin is
configured to CX pin.
= 0, Disable RFC module, all the IOxx/RFCx pins are configured to IOXX pin, and the IOA1/CX pin is
configured to IOA1 pin.
2.1.24 RFCDL (RFC Data Register Low Byte) (Bank 3)
Address
Name
B7
B6
B5
0Bh (r)
RFCDL
RFCD7
RFCD6
RFCD5
RFCD7:RFCD0
: The low byte of RFC conversion result.
2.1.25 RFCDH (RFC Data Register High Byte) (Bank 3)
Address
Name
B7
B6
B5
0Ch (r)
RFCDH
RFCOV RFCD14
RFCD13 RFCD12
RFCD14:RFCD8
: The high byte of RFC conversion result.
RFCOV
: RFC counter overflow flag. Set when RFC counter overflow, reset by RFC counter reset.
= 1, Overflow.
= 0, Not overflow.
2.1.26 CMPDX (Data X Register Data Comparator) (Bank 3)
Address
Name
B7
B6
B5
0Dh (r/w)
CMPDX
DX7
DX6
DX5
DX7:DX0
: The data X of data comparator, this data will be compared to CMPDY.
2.1.27 CMPDY (Data Y Register for Data Comparator) (Bank 3)
Address
Name
B7
B6
B5
0Eh (r/w)
CMPDY
DY7
DY6
DY5
DY7:DY0
: The data Y of data comparator, this data will be compared to CMPDX.
B4
B3
B2
B1
B0
RFCD4
RFCD3
RFCD2
RFCD1
RFCD0
B4
B3
B2
B1
B0
RFCD11
RFCD10 RFCD9
RFCD8
B4
DX4
B3
DX3
B2
DX2
B1
DX1
B0
DX0
B4
DY4
B3
DY3
B2
DY2
B1
DY1
B0
DY0
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