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參數資料
| 型號： | GS864418E-250I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 4M x 18, 2M x 36 72Mb S/DCD Sync Burst SRAMs |
| 中文描述： | 4M X 18 CACHE SRAM, 6.5 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, FPBGA-165 |
| 文件頁數： | 25/32頁 |
| 文件大小： | 811K |
| 代理商： | GS864418E-250I |
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JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
011
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
110
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1.
2.
Instruction codes expressed in binary, MSB on left, LSB on right.
Default instruction automatically loaded at power-up and in test-logic-reset state.
Preliminary
GS864418/36E-xxxV
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 6/2006
25/32
2003, GSI Technology
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相關代理商/技術參數 |
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|---|---|
| GS864418E-250IV | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 36 72Mb S/DCD Sync Burst SRAMs |
| GS864418E-V | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 36 72Mb S/DCD Sync Burst SRAMs |
| GS864418GB-200 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 72MBIT 4MX18 6.5NS/3NS 119FBGA - Trays |
| GS864418GB-200I | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 72MBIT 4MX18 6.5NS/3NS 119FBGA - Trays |
| GS864418GB-200IV | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 72MBIT 4MX18 6.5NS/3NS 119FPBGA - Trays |
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