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參數資料
型號: GS9092A
廠商: Gennum Corporation
英文描述: GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
中文描述: GS9092A GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內
文件頁數: 21/59頁
文件大小: 614K
代理商: GS9092A
GS9092A Data Sheet
34715 - 0
February 2006
21 of 59
3.2.1 Parallel Input in SMPTE Mode
When the device is operating in SMPTE mode (see
SMPTE Mode on page 32
), SD
data is presented to the input bus in 10-bit multiplexed format. The input data
format must be word aligned, multiplexed luma and chroma data.
NOTE: When operating the device in an 8-bit SMPTE system, the 2 LSBs
(DIN [1:0]) must be set to 0.
3.2.2 Parallel Input in DVB-ASI Mode
When operating in DVB-ASI mode (see
DVB-ASI Mode on page 33
), the device will
accept 8-bit data words on DIN[7:0] such that DIN7 = HIN is the most significant bit
of the encoded transport stream data and DIN0 = AIN is the least significant bit.
In addition, DIN9 and DIN8 will be configured as the DVB-ASI control signals
INSSYNCIN and K_IN respectively. See
Control Signal Inputs on page 33
for a
description of these DVB-ASI specific input signals.
3.2.3 Parallel Input in Data-Through Mode
When operating in Data-Through mode (see
Data-Through Mode on page 34
), the
GS9092A passes data presented to the parallel input bus to the serial output
without performing any encoding, scrambling, or word-alignment.
3.2.4 I/O Buffers
The parallel data bus, status signal outputs, and control signal input pins are all
connected to high-impedance buffers. These buffers use either +1.8V or +3.3V
DC, supplied at the IO_VDD and IO_GND pins. For a +3.3V tolerant I/O, the
IO_VDD pins can be connected to either +1.8V or +3.3V. For a +5V tolerant I/O,
the IO_VDD pins must be supplied with +3.3V.
While RESET is LOW, STAT output pins are muted and all other output pins
become high impedance.
Table 3-1: Input Data Format Selection
Pin Settings
Input Data Format
DIN[9:0]
SMPTE_BYPASS
DVB_ASI
10-bit Data
DATA
LOW
LOW
10-bit Multiplexed SD
Luma/Chroma
HIGH
LOW
10-bit DVB-ASI
DVB-ASI data
X
HIGH
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